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authorChen-Yu Tsai <wens@csie.org>2016-02-15 17:40:19 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-02-16 09:47:41 +0100
commit33f60d02605a3a604e56b07a78d80d7d801b2843 (patch)
treead769be9c350c76559bef71f8b34e8fbfe0cffd3 /drivers/clk/sunxi
parentb0b6413f0dc8d1faba98745cf3a008ed9493df59 (diff)
downloadop-kernel-dev-33f60d02605a3a604e56b07a78d80d7d801b2843.zip
op-kernel-dev-33f60d02605a3a604e56b07a78d80d7d801b2843.tar.gz
clk: sunxi: Fix sun8i-a23-apb0-clk divider flags
The APB0 clock on A23 is a zero-based divider, not a power-of-two based divider. Note that this patch does not apply cleanly to kernels before 4.5-rc1, which added CLK_OF_DECLARE support to this driver. Fixes: 57a1fbf28424 ("clk: sunxi: Add A23 APB0 divider clock support") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi')
-rw-r--r--drivers/clk/sunxi/clk-sun8i-apb0.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi/clk-sun8i-apb0.c b/drivers/clk/sunxi/clk-sun8i-apb0.c
index 7ba6110..2ea61de 100644
--- a/drivers/clk/sunxi/clk-sun8i-apb0.c
+++ b/drivers/clk/sunxi/clk-sun8i-apb0.c
@@ -36,7 +36,7 @@ static struct clk *sun8i_a23_apb0_register(struct device_node *node,
/* The A23 APB0 clock is a standard 2 bit wide divider clock */
clk = clk_register_divider(NULL, clk_name, clk_parent, 0, reg,
- 0, 2, CLK_DIVIDER_POWER_OF_TWO, NULL);
+ 0, 2, 0, NULL);
if (IS_ERR(clk))
return clk;
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