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| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2014-01-07 17:47:52 +0100 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2014-02-18 21:41:01 -0800 |
| commit | 995a9190ac9ca85cc15d11d9566017e91c58a118 (patch) | |
| tree | 8725d24c919cbbc029a751a7820d6589bda4f104 /drivers/clk/rockchip | |
| parent | 6d0abeca3242a88cab8232e4acd7e2bf088f3bc2 (diff) | |
| download | op-kernel-dev-995a9190ac9ca85cc15d11d9566017e91c58a118.zip op-kernel-dev-995a9190ac9ca85cc15d11d9566017e91c58a118.tar.gz | |
clk: shmobile: rcar-gen2: Fix clock parent all non-PLL clocks
The lb, qspi, sdh, sd0 and sd1 clocks have the PLL1 (divided by 2) as
their parent, not the main clock. Fix it.
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/rockchip')
0 files changed, 0 insertions, 0 deletions
