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author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2015-05-28 10:45:51 +0200 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-06-04 14:27:06 -0700 |
commit | 4a1caed3d0c2fbf8c9f18909bec69e2aa2638b97 (patch) | |
tree | 7540974803b64085cd2709c196a6463c5b9ecd4d /drivers/clk/rockchip/clk-pll.c | |
parent | 90acb40f1874f7b304b1d8d9b07c72aa83337e31 (diff) | |
download | op-kernel-dev-4a1caed3d0c2fbf8c9f18909bec69e2aa2638b97.zip op-kernel-dev-4a1caed3d0c2fbf8c9f18909bec69e2aa2638b97.tar.gz |
clk: make several parent names const
Since commit 2893c379461a ("clk: make strings in parent name arrays
const") the name of parent clocks can be const. So add more const in
several clock drivers.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/rockchip/clk-pll.c')
-rw-r--r-- | drivers/clk/rockchip/clk-pll.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index f8d3baf..7602726 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -329,10 +329,10 @@ static const struct clk_ops rockchip_rk3066_pll_clk_ops = { */ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, - const char *name, const char **parent_names, u8 num_parents, - void __iomem *base, int con_offset, int grf_lock_offset, - int lock_shift, int mode_offset, int mode_shift, - struct rockchip_pll_rate_table *rate_table, + const char *name, const char *const *parent_names, + u8 num_parents, void __iomem *base, int con_offset, + int grf_lock_offset, int lock_shift, int mode_offset, + int mode_shift, struct rockchip_pll_rate_table *rate_table, u8 clk_pll_flags, spinlock_t *lock) { const char *pll_parents[3]; |