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author | Heiko Stuebner <heiko@sntech.de> | 2015-12-18 17:51:55 +0100 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2015-12-21 02:01:19 +0100 |
commit | dfff24bde7fb8d57482e907d5dfb0be3a9e28119 (patch) | |
tree | cc1a03e1a6db0fc471f9581a03625d1cc69cf0c8 /drivers/clk/rockchip/clk-mmc-phase.c | |
parent | 2abc02fc494fa4c920a08a1d0beecabafbcb2104 (diff) | |
download | op-kernel-dev-dfff24bde7fb8d57482e907d5dfb0be3a9e28119.zip op-kernel-dev-dfff24bde7fb8d57482e907d5dfb0be3a9e28119.tar.gz |
clk: rockchip: only enter pll slow-mode directly before reboots on rk3288
As commit 1d33929e2a2b ("clk: rockchip: switch PLLs to slow mode before
reboot for rk3288") states, switching the PLLs to slow-mode is only
necessary when rebooting using the soft-reset done through the CRU.
The dwc2 controllers used create really big number of interrupts in
special constellations involving usb-hubs and their number is so high,
it can even overwhelm the interrupt handler if the cpu-speed os to low.
Right now the PLLs are put into slow-mode in a shutdown syscore_ops
callback which means it happens on all reboots (not only the soft-reset
ones) and even on poweroff actions.
This can result in the system not powering off and getting stuck instead,
so we should move the slow-mode change nearer to the actual reboot action.
For this we introduce the possiblity to also set a callback that gets
called from the restart-handler directly prior to restarting the system
and move the shutdown-callback to this new option.
With this the slow-mode switch is done only on the necessary reboots
and also has a smaller possibility of causing artifacts.
Fixes: 1d33929e2a2b ("clk: rockchip: switch PLLs to slow mode before reboot for rk3288")
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Diffstat (limited to 'drivers/clk/rockchip/clk-mmc-phase.c')
0 files changed, 0 insertions, 0 deletions