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author | Heiko Stuebner <heiko@sntech.de> | 2016-12-27 00:00:38 +0100 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2017-01-02 14:24:57 +0100 |
commit | cb1d9f6ddaa436f2dce2710740b7a3546700949c (patch) | |
tree | 6195814ec1a044894fbea51b0caf6a88b3b16cee /drivers/clk/rockchip/Makefile | |
parent | 0c744ea4f77d72b3dcebb7a8f2684633ec79be88 (diff) | |
download | op-kernel-dev-cb1d9f6ddaa436f2dce2710740b7a3546700949c.zip op-kernel-dev-cb1d9f6ddaa436f2dce2710740b7a3546700949c.tar.gz |
clk: rockchip: add a clock-type for muxes based in the grf
Rockchip socs often have some tiny number of muxes not controlled from
the core clock controller but through bits set in the general register
files. Add a clock-type that can control these as well, so that we
don't need to work around them being absent.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip/Makefile')
-rw-r--r-- | drivers/clk/rockchip/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile index 16e098c..a43a54d 100644 --- a/drivers/clk/rockchip/Makefile +++ b/drivers/clk/rockchip/Makefile @@ -8,6 +8,7 @@ obj-y += clk-pll.o obj-y += clk-cpu.o obj-y += clk-inverter.o obj-y += clk-mmc-phase.o +obj-y += clk-muxgrf.o obj-y += clk-ddr.o obj-$(CONFIG_RESET_CONTROLLER) += softrst.o |