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authorStephen Boyd <sboyd@codeaurora.org>2017-01-27 11:51:37 -0800
committerStephen Boyd <sboyd@codeaurora.org>2017-01-27 11:51:37 -0800
commitd646d812f37c412bfec3503c9d4308eea2fa0df8 (patch)
treee55231bf76462ad484feacb0fab65209ead2ebf5 /drivers/clk/renesas/clk-mstp.c
parente120c17a70e5bad1ed601502844f708837b132a8 (diff)
parentd963654e109565cf73399815d7585917f2d69a30 (diff)
downloadop-kernel-dev-d646d812f37c412bfec3503c9d4308eea2fa0df8.zip
op-kernel-dev-d646d812f37c412bfec3503c9d4308eea2fa0df8.tar.gz
Merge tag 'clk-renesas-for-v4.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next
Pull Renesas clk driver updates from Geert Uytterhoeven: - Use CLK_IS_CRITICAL to handle critical clocks, - Add Reset Control Support for R-Car Gen2 and Gen3, and RZ/G1, - Add IIC-DVFS clocks for R-Car H3 and M3-W, - Minor cleanups. * tag 'clk-renesas-for-v4.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: r8a7796: Add IIC-DVFS clock clk: renesas: r8a7795: Add IIC-DVFS clock clk: renesas: cpg-mssr: Add support for reset control clk: renesas: cpg-mssr: Rename cpg_mssr_priv.mstp_lock clk: renesas: cpg-mssr: Document suitability for RZ/G1 dt-bindings: clock: renesas: cpg-mssr: Document reset control support clk: renesas: mstp: Reformat cpg_mstp_clock_register() for git diff clk: renesas: mstp: Make INTC-SYS a critical clock clk: renesas: cpg-mssr: Migrate to CLK_IS_CRITICAL
Diffstat (limited to 'drivers/clk/renesas/clk-mstp.c')
-rw-r--r--drivers/clk/renesas/clk-mstp.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/clk/renesas/clk-mstp.c b/drivers/clk/renesas/clk-mstp.c
index b533f99..3ce819c 100644
--- a/drivers/clk/renesas/clk-mstp.c
+++ b/drivers/clk/renesas/clk-mstp.c
@@ -141,9 +141,9 @@ static const struct clk_ops cpg_mstp_clock_ops = {
.is_enabled = cpg_mstp_clock_is_enabled,
};
-static struct clk * __init
-cpg_mstp_clock_register(const char *name, const char *parent_name,
- unsigned int index, struct mstp_clock_group *group)
+static struct clk * __init cpg_mstp_clock_register(const char *name,
+ const char *parent_name, unsigned int index,
+ struct mstp_clock_group *group)
{
struct clk_init_data init;
struct mstp_clock *clock;
@@ -158,6 +158,11 @@ cpg_mstp_clock_register(const char *name, const char *parent_name,
init.name = name;
init.ops = &cpg_mstp_clock_ops;
init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT;
+ /* INTC-SYS is the module clock of the GIC, and must not be disabled */
+ if (!strcmp(name, "intc-sys")) {
+ pr_debug("MSTP %s setting CLK_IS_CRITICAL\n", name);
+ init.flags |= CLK_IS_CRITICAL;
+ }
init.parent_names = &parent_name;
init.num_parents = 1;
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