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| author | Rajendra Nayak <rnayak@codeaurora.org> | 2016-09-29 14:05:45 +0530 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-11-01 18:39:17 -0700 |
| commit | 400d9fda39bc8e16412103796040aef484fe7f5d (patch) | |
| tree | bc99d5aba6b18334d9f8729766a4aef56ed92967 /drivers/clk/qcom/clk-alpha-pll.c | |
| parent | 31256f4892b443e1cf03de48ea447a86ec32038e (diff) | |
| download | op-kernel-dev-400d9fda39bc8e16412103796040aef484fe7f5d.zip op-kernel-dev-400d9fda39bc8e16412103796040aef484fe7f5d.tar.gz | |
clk: qcom: Enable FSM mode for votable alpha PLLs
The votable alpha PLLs need to have the fsm mode enabled as part
of the initialization. The sequence seems to be the same as used
by clk-pll, so move the function which does this into a common
place and reuse it for the clk-alpha-pll
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/clk-alpha-pll.c')
| -rw-r--r-- | drivers/clk/qcom/clk-alpha-pll.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index fd3e32c..c6ddc04e 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -18,6 +18,7 @@ #include <linux/delay.h> #include "clk-alpha-pll.h" +#include "common.h" #define PLL_MODE 0x00 # define PLL_OUTCTRL BIT(0) @@ -136,6 +137,9 @@ void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, mask |= config->vco_mask; regmap_update_bits(regmap, off + PLL_USER_CTL, mask, val); + + if (pll->flags & SUPPORTS_FSM_MODE) + qcom_pll_set_fsm_mode(regmap, off + PLL_MODE, 6, 0); } static int clk_alpha_pll_hwfsm_enable(struct clk_hw *hw) |
