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authorBintian Wang <bintian.wang@huawei.com>2015-05-29 10:08:38 +0800
committerMichael Turquette <mturquette@linaro.org>2015-06-03 15:12:25 -0700
commit72ea48610d43c59507d9ad39083d40085400ba12 (patch)
tree826b1a5073246280adf5d90dbbecf492848af009 /drivers/clk/hisilicon/Makefile
parent2a40a2ea109269def06f991f771c2bf2f6c0f396 (diff)
downloadop-kernel-dev-72ea48610d43c59507d9ad39083d40085400ba12.zip
op-kernel-dev-72ea48610d43c59507d9ad39083d40085400ba12.tar.gz
clk: hi6220: Clock driver support for Hisilicon hi6220 SoC
Add clock drivers for hi6220 SoC, this driver controls the SoC registers to supply different clocks to different IPs in the SoC. We add one divider clock for hi6220 because the divider in hi6220 also has a mask bit but it doesnot obey the rule defined by flag "CLK_DIVIDER_HIWORD_MASK", we can not get index of the mask bit by left shift fixed bits (e.g. 16 bits), so we add this divider clock to handle it. Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Bintian Wang <bintian.wang@huawei.com> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org> Tested-by: Will Deacon <will.deacon@arm.com> Tested-by: Tyler Baker <tyler.baker@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/hisilicon/Makefile')
-rw-r--r--drivers/clk/hisilicon/Makefile3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
index 038c02f..48f0116 100644
--- a/drivers/clk/hisilicon/Makefile
+++ b/drivers/clk/hisilicon/Makefile
@@ -2,8 +2,9 @@
# Hisilicon Clock specific Makefile
#
-obj-y += clk.o clkgate-separated.o
+obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o
obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o
obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o
obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o
+obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o
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