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authorStephen Boyd <sboyd@kernel.org>2018-06-01 10:17:54 -0700
committerStephen Boyd <sboyd@kernel.org>2018-06-01 10:17:54 -0700
commit2180cdf49a440a02fed689f0802a568843348169 (patch)
treec095fbe88457380c235dda47f3d416317f12335b /drivers/clk/davinci/pll-dm644x.c
parent37ffe9acecc689fdaba5dc6853054ebba4e7f1da (diff)
parentde1ca2d07bdc3fb4a21991ca78b026324636f541 (diff)
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Merge tag 'meson-clk-4.18-2' of https://github.com/BayLibre/clk-meson into clk-meson
Pull Second round of update for meson clocks from Jerome Brunet: - Add critical flag to meson8b's fdiv2 as temporary fixup for the ethernet. - Clean up license headers with SPDX - Add round closest support to mpll driver. * tag 'meson-clk-4.18-2' of https://github.com/BayLibre/clk-meson: clk: meson: axg: let mpll clocks round closest clk: meson: mpll: add round closest support clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICAL clk: meson: use SPDX license identifiers consistently
Diffstat (limited to 'drivers/clk/davinci/pll-dm644x.c')
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