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| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2016-12-21 11:26:55 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-03-07 05:17:35 -0800 |
| commit | cda82ace3d4eff6a38f00a65db435fe35a3916f0 (patch) | |
| tree | 633cace50d86505c9c292c34a1df1d8fc326a39c /drivers/clk/clk.c | |
| parent | c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201 (diff) | |
| download | op-kernel-dev-cda82ace3d4eff6a38f00a65db435fe35a3916f0.zip op-kernel-dev-cda82ace3d4eff6a38f00a65db435fe35a3916f0.tar.gz | |
dt-bindings: arm: update Armada CP110 system controller binding
It turns out that in the CP110 HW block present in Marvell Armada
7K/8K SoCs, gatable clock n°18 not only controls SD/MMC, but also the
GOP block. This commit updates the Device Tree binding for this piece
of hardware accordingly.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/clk.c')
0 files changed, 0 insertions, 0 deletions
