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| author | Florian Fainelli <f.fainelli@gmail.com> | 2017-11-07 16:44:46 -0800 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2017-11-29 16:43:46 +1100 |
| commit | 6f09359a6810d1c903c97231803ef4518a3f7558 (patch) | |
| tree | beeb0d2d3ef97577ec790c43a37fe2a600385920 /drivers/char | |
| parent | abd42026eab99691d8ab9e1cd417553cfadf9b76 (diff) | |
| download | op-kernel-dev-6f09359a6810d1c903c97231803ef4518a3f7558.zip op-kernel-dev-6f09359a6810d1c903c97231803ef4518a3f7558.tar.gz | |
hwrng: bcm2835 - Add Broadcom MIPS I/O accessors
Broadcom MIPS HW is always strapped to match the system-wide endian such
that all I/O access to this RNG block is done with the native CPU
endian, account for that.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/char')
| -rw-r--r-- | drivers/char/hw_random/bcm2835-rng.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/char/hw_random/bcm2835-rng.c b/drivers/char/hw_random/bcm2835-rng.c index 3a60747..6dd8f48 100644 --- a/drivers/char/hw_random/bcm2835-rng.c +++ b/drivers/char/hw_random/bcm2835-rng.c @@ -44,13 +44,22 @@ static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng) static inline u32 rng_readl(struct bcm2835_rng_priv *priv, u32 offset) { - return readl(priv->base + offset); + /* MIPS chips strapped for BE will automagically configure the + * peripheral registers for CPU-native byte order. + */ + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) + return __raw_readl(priv->base + offset); + else + return readl(priv->base + offset); } static inline void rng_writel(struct bcm2835_rng_priv *priv, u32 val, u32 offset) { - writel(val, priv->base + offset); + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) + __raw_writel(val, priv->base + offset); + else + writel(val, priv->base + offset); } static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max, |
