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author | Bjorn Helgaas <bhelgaas@google.com> | 2014-01-03 18:26:58 -0700 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-01-06 17:49:22 -0700 |
commit | e501b3d87f003dfad8fcbd0f55ae17ea52495a56 (patch) | |
tree | 1307d77ead535d134b6f62df53c923cf1247baa6 /drivers/char/agp/via-agp.c | |
parent | 06cf56e497c8c1469b0931caa7d5b1d827655fe2 (diff) | |
download | op-kernel-dev-e501b3d87f003dfad8fcbd0f55ae17ea52495a56.zip op-kernel-dev-e501b3d87f003dfad8fcbd0f55ae17ea52495a56.tar.gz |
agp: Support 64-bit APBASE
Per the AGP 3.0 spec, APBASE is a standard PCI BAR and may be either 32
bits or 64 bits wide. Many drivers read APBASE directly, but they only
handled 32-bit BARs.
The PCI core reads APBASE at enumeration-time. Use pci_bus_address()
instead of reading it again in the driver. This works correctly for both
32-bit and 64-bit BARs.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/char/agp/via-agp.c')
-rw-r--r-- | drivers/char/agp/via-agp.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/char/agp/via-agp.c b/drivers/char/agp/via-agp.c index 74d3aa3..228f20c 100644 --- a/drivers/char/agp/via-agp.c +++ b/drivers/char/agp/via-agp.c @@ -43,16 +43,15 @@ static int via_fetch_size(void) static int via_configure(void) { - u32 temp; struct aper_size_info_8 *current_size; current_size = A_SIZE_8(agp_bridge->current_size); /* aperture size */ pci_write_config_byte(agp_bridge->dev, VIA_APSIZE, current_size->size_value); - /* address to map too */ - pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp); - agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); + /* address to map to */ + agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev, + AGP_APERTURE_BAR); /* GART control register */ pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000000f); @@ -132,9 +131,9 @@ static int via_configure_agp3(void) current_size = A_SIZE_16(agp_bridge->current_size); - /* address to map too */ - pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp); - agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); + /* address to map to */ + agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev, + AGP_APERTURE_BAR); /* attbase - aperture GATT base */ pci_write_config_dword(agp_bridge->dev, VIA_AGP3_ATTBASE, |