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| author | Tomas Henzl <thenzl@redhat.com> | 2015-02-17 17:40:22 +0100 |
|---|---|---|
| committer | James Bottomley <JBottomley@Odin.com> | 2015-05-31 11:14:34 -0700 |
| commit | b9ea9dcdb9ac43cd83c2c9f47116c3852447e72d (patch) | |
| tree | 8acd85775d5fa958d73d6590be086d460a6a77d0 /drivers/block/cciss.c | |
| parent | c854c38559c5b5f920c6ee6448c4a719cdd9ef1d (diff) | |
| download | op-kernel-dev-b9ea9dcdb9ac43cd83c2c9f47116c3852447e72d.zip op-kernel-dev-b9ea9dcdb9ac43cd83c2c9f47116c3852447e72d.tar.gz | |
cciss: correct the non-resettable board list
The hpsa driver carries a more recent version,
copy the table from there.
Signed-off-by: Tomas Henzl <thenzl@redhat.com>
Acked-by: Don Brace <Don.Brace@pmcs.com>
Signed-off-by: James Bottomley <JBottomley@Odin.com>
Diffstat (limited to 'drivers/block/cciss.c')
| -rw-r--r-- | drivers/block/cciss.c | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c index 4849822..0422c47 100644 --- a/drivers/block/cciss.c +++ b/drivers/block/cciss.c @@ -582,12 +582,32 @@ static u32 unresettable_controller[] = { 0x3215103C, /* Smart Array E200i */ 0x3237103C, /* Smart Array E500 */ 0x323D103C, /* Smart Array P700m */ + 0x40800E11, /* Smart Array 5i */ 0x409C0E11, /* Smart Array 6400 */ 0x409D0E11, /* Smart Array 6400 EM */ + 0x40700E11, /* Smart Array 5300 */ + 0x40820E11, /* Smart Array 532 */ + 0x40830E11, /* Smart Array 5312 */ + 0x409A0E11, /* Smart Array 641 */ + 0x409B0E11, /* Smart Array 642 */ + 0x40910E11, /* Smart Array 6i */ }; /* List of controllers which cannot even be soft reset */ static u32 soft_unresettable_controller[] = { + 0x40800E11, /* Smart Array 5i */ + 0x40700E11, /* Smart Array 5300 */ + 0x40820E11, /* Smart Array 532 */ + 0x40830E11, /* Smart Array 5312 */ + 0x409A0E11, /* Smart Array 641 */ + 0x409B0E11, /* Smart Array 642 */ + 0x40910E11, /* Smart Array 6i */ + /* Exclude 640x boards. These are two pci devices in one slot + * which share a battery backed cache module. One controls the + * cache, the other accesses the cache through the one that controls + * it. If we reset the one controlling the cache, the other will + * likely not be happy. Just forbid resetting this conjoined mess. + */ 0x409C0E11, /* Smart Array 6400 */ 0x409D0E11, /* Smart Array 6400 EM */ }; @@ -4663,8 +4683,7 @@ static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev) */ cciss_lookup_board_id(pdev, &board_id); if (!ctlr_is_resettable(board_id)) { - dev_warn(&pdev->dev, "Cannot reset Smart Array 640x " - "due to shared cache module."); + dev_warn(&pdev->dev, "Controller not resettable\n"); return -ENODEV; } |
