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| author | Doug Anderson <dianders@chromium.org> | 2014-12-04 13:33:05 -0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2014-12-21 14:15:26 +0100 |
| commit | 221dfbae2b33868267d979a113079678dcd4dab3 (patch) | |
| tree | b7212cc740653ce2342edc3e1390e30727f7b4d1 /drivers/base | |
| parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) | |
| download | op-kernel-dev-221dfbae2b33868267d979a113079678dcd4dab3.zip op-kernel-dev-221dfbae2b33868267d979a113079678dcd4dab3.tar.gz | |
clk: rockchip: Add CLK_SET_RATE_PARENT to sclk_uart clocks
We'd like to be able to set the clock rate of the sclk_uart clocks and
actually be able to achieve clock rates greater than 24MHz. To do
this we need to be able to pass rate changes upward.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/base')
0 files changed, 0 insertions, 0 deletions
