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authorSaeed Bishara <saeed@marvell.com>2009-12-06 18:26:17 +0200
committerJeff Garzik <jgarzik@redhat.com>2009-12-17 00:56:36 -0500
commitd7b0c143693bcbf391d2be235e150b97bfd8f9ba (patch)
treef17adbdea81b383a08b4c97b4c21e7392de75d93 /drivers/ata
parent718deb6b61e34c200c1f2b706176d9aac334cb2d (diff)
downloadop-kernel-dev-d7b0c143693bcbf391d2be235e150b97bfd8f9ba.zip
op-kernel-dev-d7b0c143693bcbf391d2be235e150b97bfd8f9ba.tar.gz
sata_mv: increase PIO IORDY timeout
The old value (0xbc) in cycles of the IORDY timeout is suitable for devices with core clock of 166 MHz, but some SoC controllers have faster core clocks. The new value will make the IORDY timeout large enough also for all SoC devices. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/sata_mv.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index a8a7be0..bbeaf3a 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -3393,7 +3393,7 @@ static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv,
ZERO(0x024); /* respq outp */
ZERO(0x020); /* respq inp */
ZERO(0x02c); /* test control */
- writel(0xbc, port_mmio + EDMA_IORDY_TMOUT);
+ writel(0x800, port_mmio + EDMA_IORDY_TMOUT);
}
#undef ZERO
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