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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-12-08 19:25:28 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-12-11 14:52:44 +0000
commitf6718653361e8f8a6aac9946822aa2090edf4f37 (patch)
tree884f9ec31d7c6c33ffaa443bb01c03fdff7292f9 /drivers/ata
parent9e28d7e8c5422a47db886c4104221ea165595de0 (diff)
downloadop-kernel-dev-f6718653361e8f8a6aac9946822aa2090edf4f37.zip
op-kernel-dev-f6718653361e8f8a6aac9946822aa2090edf4f37.tar.gz
[ARM] dma: pata_icside's contiguous sg array is now redundant
Now that the IOMD DMA code walks the scatterlist using sg_next, converting the sg list into a contiguous list is no longer required. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/ata')
-rw-r--r--drivers/ata/pata_icside.c13
1 files changed, 1 insertions, 12 deletions
diff --git a/drivers/ata/pata_icside.c b/drivers/ata/pata_icside.c
index cf9e984..63121f4 100644
--- a/drivers/ata/pata_icside.c
+++ b/drivers/ata/pata_icside.c
@@ -57,7 +57,6 @@ struct pata_icside_state {
u8 disabled;
unsigned int speed[ATA_MAX_DEVICES];
} port[2];
- struct scatterlist sg[PATA_ICSIDE_MAX_SG];
};
struct pata_icside_info {
@@ -222,9 +221,7 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
struct pata_icside_state *state = ap->host->private_data;
- struct scatterlist *sg, *rsg = state->sg;
unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE;
- unsigned int si;
/*
* We are simplex; BUG if we try to fiddle with DMA
@@ -233,20 +230,12 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
BUG_ON(dma_channel_active(state->dma));
/*
- * Copy ATAs scattered sg list into a contiguous array of sg
- */
- for_each_sg(qc->sg, sg, qc->n_elem, si) {
- memcpy(rsg, sg, sizeof(*sg));
- rsg++;
- }
-
- /*
* Route the DMA signals to the correct interface
*/
writeb(state->port[ap->port_no].port_sel, state->ioc_base);
set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]);
- set_dma_sg(state->dma, state->sg, rsg - state->sg);
+ set_dma_sg(state->dma, qc->sg, qc->n_elem);
set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ);
/* issue r/w command */
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