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authorKristoffer Nyborg Gregertsen <kngregertsen@norway.atmel.com>2007-08-08 16:57:08 +0200
committerJeff Garzik <jeff@garzik.org>2007-10-12 14:55:37 -0400
commit7c9ef8e418374aec0a62e64d9b40d457634fd039 (patch)
tree6a9c30266aa97b38515647cdc404cb7d3c512e15 /drivers/ata/Makefile
parentd830d1731fa5906aad20c228ac8b73005b13d468 (diff)
downloadop-kernel-dev-7c9ef8e418374aec0a62e64d9b40d457634fd039.zip
op-kernel-dev-7c9ef8e418374aec0a62e64d9b40d457634fd039.tar.gz
AVR32 PATA driver
Updated and simplified driver. Use only register transfer timing for both data and register transfers. This gives poorer performance in PIO1 and 2, but should not be a problem in PIO3 and 4, correct me if I'm wrong :) The driver works very we'll but I still wonder about the interrupts. I have an interrupt line, that works nicely when POLLING flag is not set. The problem is the number of interrupts that eat away my CPU cycles. When using the POLLING flag there seem to be some interrupts that dosen't get cleared. Furthermore the device dosen't drive INTRQ high, it stays at 2.5 volts and generates a lot of interrupts due to ripple / noise. What to do? Signed-off-by: Kristoffer Nyborg Gregertsen <kngregertsen@norway.atmel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/Makefile')
-rw-r--r--drivers/ata/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index c2ecba5..4eb7fb4 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
obj-$(CONFIG_PATA_ALI) += pata_ali.o
obj-$(CONFIG_PATA_AMD) += pata_amd.o
obj-$(CONFIG_PATA_ARTOP) += pata_artop.o
+obj-$(CONFIG_PATA_AT32) += pata_at32.o
obj-$(CONFIG_PATA_ATIIXP) += pata_atiixp.o
obj-$(CONFIG_PATA_CMD640_PCI) += pata_cmd640.o
obj-$(CONFIG_PATA_CMD64X) += pata_cmd64x.o
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