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authorLen Brown <len.brown@intel.com>2009-01-28 12:47:15 -0500
committerLen Brown <len.brown@intel.com>2009-01-28 13:59:56 -0500
commita2b7b01c072435b7832ab392167545a1b38cabc3 (patch)
tree6a8aeb8723c71bc819d9576ebbb6bc2110513a40 /drivers/acpi
parent152a649b647a8ef47bb74ff9e11850fa6001bedc (diff)
downloadop-kernel-dev-a2b7b01c072435b7832ab392167545a1b38cabc3.zip
op-kernel-dev-a2b7b01c072435b7832ab392167545a1b38cabc3.tar.gz
ACPI: remove locking from PM1x_STS register reads
PM1a_STS and PM1b_STS are twins that get OR'd together on reads, and all writes are repeated to both. The fields in PM1x_STS are single bits only, there are no multi-bit fields. So it is not necessary to lock PM1x_STS reads against writes because it is impossible to read an intermediate value of a single bit. It will either be 0 or 1, even if a write is in progress during the read. Reads are asynchronous to writes no matter if a lock is used or not. Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/acpi')
-rw-r--r--drivers/acpi/processor_idle.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 66a9d81..ae00108 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -447,7 +447,7 @@ static void acpi_processor_idle(void)
pr->power.bm_activity <<= diff;
- acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
+ acpi_get_register_unlocked(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
if (bm_status) {
pr->power.bm_activity |= 0x1;
acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
@@ -1383,7 +1383,7 @@ static int acpi_idle_bm_check(void)
{
u32 bm_status = 0;
- acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
+ acpi_get_register_unlocked(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
if (bm_status)
acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
/*
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