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authorHuang Ying <ying.huang@intel.com>2011-12-08 11:25:40 +0800
committerLen Brown <len.brown@intel.com>2012-01-17 03:54:15 -0500
commit04c25997c97e57d95d1f5a7a6e5fff2411dbd48b (patch)
tree9cd7a85d459dcfa56e7a465a556dd813d0cfecc9 /drivers/acpi
parent805a6af8dba5dfdd35ec35dc52ec0122400b2610 (diff)
downloadop-kernel-dev-04c25997c97e57d95d1f5a7a6e5fff2411dbd48b.zip
op-kernel-dev-04c25997c97e57d95d1f5a7a6e5fff2411dbd48b.tar.gz
ACPI, Add 64bit read/write support to atomicio on i386
There is no 64bit read/write support in ACPI atomicio because readq/writeq is used to implement 64bit read/write, but readq/writeq is not available on i386. This patch implement 64bit read/write support in atomicio via two readl/writel. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/acpi')
-rw-r--r--drivers/acpi/atomicio.c36
1 files changed, 30 insertions, 6 deletions
diff --git a/drivers/acpi/atomicio.c b/drivers/acpi/atomicio.c
index cfc0cc1..1016f18 100644
--- a/drivers/acpi/atomicio.c
+++ b/drivers/acpi/atomicio.c
@@ -260,6 +260,21 @@ int acpi_post_unmap_gar(struct acpi_generic_address *reg)
}
EXPORT_SYMBOL_GPL(acpi_post_unmap_gar);
+#ifdef readq
+static inline u64 read64(const volatile void __iomem *addr)
+{
+ return readq(addr);
+}
+#else
+static inline u64 read64(const volatile void __iomem *addr)
+{
+ u64 l, h;
+ l = readl(addr);
+ h = readl(addr+4);
+ return l | (h << 32);
+}
+#endif
+
/*
* Can be used in atomic (including NMI) or process context. RCU read
* lock can only be released after the IO memory area accessing.
@@ -280,11 +295,9 @@ static int acpi_atomic_read_mem(u64 paddr, u64 *val, u32 width)
case 32:
*val = readl(addr);
break;
-#ifdef readq
case 64:
- *val = readq(addr);
+ *val = read64(addr);
break;
-#endif
default:
return -EINVAL;
}
@@ -293,6 +306,19 @@ static int acpi_atomic_read_mem(u64 paddr, u64 *val, u32 width)
return 0;
}
+#ifdef writeq
+static inline void write64(u64 val, volatile void __iomem *addr)
+{
+ writeq(val, addr);
+}
+#else
+static inline void write64(u64 val, volatile void __iomem *addr)
+{
+ writel(val, addr);
+ writel(val>>32, addr+4);
+}
+#endif
+
static int acpi_atomic_write_mem(u64 paddr, u64 val, u32 width)
{
void __iomem *addr;
@@ -309,11 +335,9 @@ static int acpi_atomic_write_mem(u64 paddr, u64 val, u32 width)
case 32:
writel(val, addr);
break;
-#ifdef writeq
case 64:
- writeq(val, addr);
+ write64(val, addr);
break;
-#endif
default:
return -EINVAL;
}
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