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authorAravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>2015-11-04 12:49:42 +0100
committerThomas Gleixner <tglx@linutronix.de>2015-11-07 10:37:51 +0100
commit3849e91f571dcb48cf2c8143480c59137d44d6bc (patch)
tree666860ae6203ecfe07e421db3c32f6f511d0b28c /crypto
parent8c058b0b9c34d8c8d7912880956543769323e2d8 (diff)
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x86/AMD: Fix last level cache topology for AMD Fam17h systems
On AMD Fam17h systems, the last level cache is not resident in the northbridge. Therefore, we cannot assign cpu_llc_id to the same value as Node ID as we have been doing until now. We should rather look at the ApicID bits of the core to provide us the last level cache ID info. Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Huang Rui <ray.huang@amd.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Jacob Shin <jacob.w.shin@gmail.com> Link: http://lkml.kernel.org/r/1446582899-9378-1-git-send-email-Aravind.Gopalakrishnan@amd.com Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'crypto')
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