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authorWayne Boyer <wayneb@linux.vnet.ibm.com>2010-06-17 11:51:40 -0700
committerJames Bottomley <James.Bottomley@suse.de>2010-07-27 12:03:49 -0500
commitcb237ef7a45f22373575b2d2ad2d06f7d38d6bce (patch)
treea6f541f660fbaf67e4c4876e86fe367c685dfee9 /crypto/async_tx/async_xor.c
parentcdd3cb156f190edb37d7066ddbf879354da2b634 (diff)
downloadop-kernel-dev-cb237ef7a45f22373575b2d2ad2d06f7d38d6bce.zip
op-kernel-dev-cb237ef7a45f22373575b2d2ad2d06f7d38d6bce.tar.gz
[SCSI] ipr: add MMIO write to perform BIST for 64 bit adapters
The 64 bit chip used in new adapters does not properly support the BIST register in PCI config space. This patch implements an alternative MMIO write reset method. Signed-off-by: Wayne Boyer <wayneb@linux.vnet.ibm.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'crypto/async_tx/async_xor.c')
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