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authorSuzuki K Poulose <suzuki.poulose@arm.com>2017-10-10 14:32:12 -0600
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-10-20 15:03:06 +0200
commit0bbb194c0c33c251ac3d33f46c8fd045d82350e5 (patch)
tree4bcde932e0f28bc9efbd2345eb6e82c1e5972c47 /block
parent58f2c391cc0560231d7636c39d31b1b26c9396b7 (diff)
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coresight: Extend the PIDR mask to cover relevant bits in PIDR2
As per coresight standards, PIDR2 register has the following format : [2-0] - JEP106_bits6to4 [3] - JEDEC, designer ID is specified by JEDEC. However some of the drivers only use mask of 0x3 for the PIDR2 leaving bits [3-2] unchecked, which could potentially match the component for a different device altogether. This patch fixes the mask and the corresponding id bits for the existing devices. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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