diff options
author | Jiri Kosina <jkosina@suse.cz> | 2010-03-08 16:55:37 +0100 |
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committer | Jiri Kosina <jkosina@suse.cz> | 2010-03-08 16:55:37 +0100 |
commit | 318ae2edc3b29216abd8a2510f3f80b764f06858 (patch) | |
tree | ce595adde342f57f379d277b25e4dd206988a052 /arch | |
parent | 25cf84cf377c0aae5dbcf937ea89bc7893db5176 (diff) | |
parent | 3e58974027b04e84f68b964ef368a6cd758e2f84 (diff) | |
download | op-kernel-dev-318ae2edc3b29216abd8a2510f3f80b764f06858.zip op-kernel-dev-318ae2edc3b29216abd8a2510f3f80b764f06858.tar.gz |
Merge branch 'for-next' into for-linus
Conflicts:
Documentation/filesystems/proc.txt
arch/arm/mach-u300/include/mach/debug-macro.S
drivers/net/qlge/qlge_ethtool.c
drivers/net/qlge/qlge_main.c
drivers/net/typhoon.c
Diffstat (limited to 'arch')
44 files changed, 59 insertions, 59 deletions
diff --git a/arch/arm/boot/bootp/init.S b/arch/arm/boot/bootp/init.S index df7bc70..8b0de41 100644 --- a/arch/arm/boot/bootp/init.S +++ b/arch/arm/boot/bootp/init.S @@ -49,7 +49,7 @@ _start: add lr, pc, #-0x8 @ lr = current load addr /* * find the end of the tag list, and then add an INITRD tag on the end. * If there is already an INITRD tag, then we ignore it; the last INITRD - * tag takes precidence. + * tag takes precedence. */ taglist: ldr r10, [r9, #0] @ tag length teq r10, #0 @ last tag (zero length)? diff --git a/arch/arm/common/clkdev.c b/arch/arm/common/clkdev.c index 446b696..6416d5b 100644 --- a/arch/arm/common/clkdev.c +++ b/arch/arm/common/clkdev.c @@ -32,7 +32,7 @@ static DEFINE_MUTEX(clocks_mutex); * If an entry has a device ID, it must match * If an entry has a connection ID, it must match * Then we take the most specific entry - with the following - * order of precidence: dev+con > dev only > con only. + * order of precedence: dev+con > dev only > con only. */ static struct clk *clk_find(const char *dev_id, const char *con_id) { diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h index 550d503..57f8ee1 100644 --- a/arch/arm/mach-at91/include/mach/at91_mci.h +++ b/arch/arm/mach-at91/include/mach/at91_mci.h @@ -77,7 +77,7 @@ #define AT91_MCI_BLKR 0x18 /* Block Register */ #define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */ -#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block lenght */ +#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block length */ #define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */ #define AT91_MCR_RDR 0x30 /* Receive Data Register */ diff --git a/arch/arm/mach-davinci/include/mach/i2c.h b/arch/arm/mach-davinci/include/mach/i2c.h index 39fdcea..2312d19 100644 --- a/arch/arm/mach-davinci/include/mach/i2c.h +++ b/arch/arm/mach-davinci/include/mach/i2c.h @@ -1,5 +1,5 @@ /* - * DaVinci I2C controller platfrom_device info + * DaVinci I2C controller platform_device info * * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> * diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c index f3757a1..c33360e8 100644 --- a/arch/arm/mach-ep93xx/micro9.c +++ b/arch/arm/mach-ep93xx/micro9.c @@ -28,7 +28,7 @@ * * Micro9-High has up to 64MB of 32-bit flash on CS1 * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1 - * Micro9-Lite uses a seperate MTD map driver for flash support + * Micro9-Lite uses a separate MTD map driver for flash support * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1 *************************************************************************/ static struct physmap_flash_data micro9_flash_data; diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 9438bf6..ab3712c 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c @@ -38,7 +38,7 @@ #define SRC_CR_INIT_MASK 0x00007fff #define SRC_CR_INIT_VAL 0x2aaa8000 -/* These adresses span 16MB, so use three individual pages */ +/* These addresses span 16MB, so use three individual pages */ static struct resource nhk8815_nand_resources[] = { { .name = "nand_addr", diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index 4386d2b..4386d2b 100755..100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index ca95d8d..ca95d8d 100755..100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c diff --git a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h index 980a099..dcef228 100644 --- a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h +++ b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h @@ -3,7 +3,7 @@ * Copyright (c) 2006 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * - * S3C2410 - SPI Controller platfrom_device info + * S3C2410 - SPI Controller platform_device info * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c index 4385986..ea7ff19 100644 --- a/arch/arm/mach-s5pc100/setup-sdhci.c +++ b/arch/arm/mach-s5pc100/setup-sdhci.c @@ -28,8 +28,8 @@ char *s5pc100_hsmmc_clksrcs[4] = { [0] = "hsmmc", [1] = "hsmmc", - /* [2] = "mmc_bus", not yet succesfuuly used yet */ - /* [3] = "48m", - note not succesfully used yet */ + /* [2] = "mmc_bus", not yet successfully used yet */ + /* [3] = "48m", - note not successfully used yet */ }; diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 01b5031..5f34eb6 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -358,7 +358,7 @@ static struct resource ave_resources[] = { /* * The AVE3e requires two regions of 256MB that it considers * "invisible". The hardware will not be able to access these - * adresses, so they should never point to system RAM. + * addresses, so they should never point to system RAM. */ { .name = "AVE3e Reserved 0", @@ -1596,7 +1596,7 @@ static void __init u300_init_check_chip(void) /* * Some devices and their resources require reserved physical memory from * the end of the available RAM. This function traverses the list of devices - * and assigns actual adresses to these. + * and assigns actual addresses to these. */ static void __init u300_assign_physmem(void) { diff --git a/arch/arm/mach-u300/include/mach/debug-macro.S b/arch/arm/mach-u300/include/mach/debug-macro.S index ca4a028..92c1242 100644 --- a/arch/arm/mach-u300/include/mach/debug-macro.S +++ b/arch/arm/mach-u300/include/mach/debug-macro.S @@ -11,7 +11,7 @@ #include <mach/hardware.h> .macro addruart, rx, tmp - /* If we move the adress using MMU, use this. */ + /* If we move the address using MMU, use this. */ mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? ldreq \rx, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address diff --git a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h index 652e2bb..dda19da 100644 --- a/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h +++ b/arch/arm/plat-s3c/include/plat/gpio-cfg-helpers.h @@ -78,7 +78,7 @@ extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, * others = Special functions (dependant on bank) * * Note, since the code to deal with the case where there are two control - * registers instead of one, we do not have a seperate set of functions for + * registers instead of one, we do not have a separate set of functions for * each case. */ extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-s3c/include/plat/nand.h index 226147b..b64115f 100644 --- a/arch/arm/plat-s3c/include/plat/nand.h +++ b/arch/arm/plat-s3c/include/plat/nand.h @@ -3,7 +3,7 @@ * Copyright (c) 2004 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * - * S3C2410 - NAND device controller platfrom_device info + * S3C2410 - NAND device controller platform_device info * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h b/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h index 36a85f5..a111ad8 100644 --- a/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h +++ b/arch/arm/plat-s3c/include/plat/regs-usb-hsotg-phy.h @@ -12,7 +12,7 @@ * published by the Free Software Foundation. */ -/* Note, this is a seperate header file as some of the clock framework +/* Note, this is a separate header file as some of the clock framework * needs to touch this if the clk_48m is used as the USB OHCI or other * peripheral source. */ diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h index 33d421d..d623235 100644 --- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h +++ b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h @@ -135,7 +135,7 @@ struct s3c_cpufreq_config { * @locktime_m: The lock-time in uS for the MPLL. * @locktime_u: The lock-time in uS for the UPLL. * @locttime_bits: The number of bits each LOCKTIME field. - * @need_pll: Set if this driver needs to change the PLL values to acheive + * @need_pll: Set if this driver needs to change the PLL values to achieve * any frequency changes. This is really only need by devices like the * S3C2410 where there is no or limited divider between the PLL and the * ARMCLK. diff --git a/arch/blackfin/include/asm/nand.h b/arch/blackfin/include/asm/nand.h index 3ae8b56..3a1e79d 100644 --- a/arch/blackfin/include/asm/nand.h +++ b/arch/blackfin/include/asm/nand.h @@ -1,5 +1,5 @@ /* - * BF5XX - NAND flash controller platfrom_device info + * BF5XX - NAND flash controller platform_device info * * Copyright 2007-2008 Analog Devices, Inc. * @@ -8,7 +8,7 @@ /* struct bf5xx_nand_platform * - * define a interface between platfrom board specific code and + * define a interface between platform board specific code and * bf54x NFC driver. * * nr_partitions = number of partitions pointed to be partitoons (or zero) diff --git a/arch/cris/arch-v10/lib/old_checksum.c b/arch/cris/arch-v10/lib/old_checksum.c index 1734b46..8f79163 100644 --- a/arch/cris/arch-v10/lib/old_checksum.c +++ b/arch/cris/arch-v10/lib/old_checksum.c @@ -77,7 +77,7 @@ __wsum csum_partial(const void *p, int len, __wsum __sum) sum += *buff++; if (endMarker > buff) - sum += *(const u8 *)buff; /* add extra byte seperately */ + sum += *(const u8 *)buff; /* add extra byte separately */ BITOFF; return (__force __wsum)sum; diff --git a/arch/cris/arch-v32/mm/tlb.c b/arch/cris/arch-v32/mm/tlb.c index 6779bcb..c030d02 100644 --- a/arch/cris/arch-v32/mm/tlb.c +++ b/arch/cris/arch-v32/mm/tlb.c @@ -189,7 +189,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, spin_unlock(&mmu_context_lock); /* - * Remember the pgd for the fault handlers. Keep a seperate + * Remember the pgd for the fault handlers. Keep a separate * copy of it because current and active_mm might be invalid * at points where * there's still a need to derefer the pgd. */ diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h index 33e842f..c1a8df2 100644 --- a/arch/h8300/include/asm/io.h +++ b/arch/h8300/include/asm/io.h @@ -25,7 +25,7 @@ * memory location directly. */ /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates - * two accesses to memory, which may be undesireable for some devices. + * two accesses to memory, which may be undesirable for some devices. */ /* diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c index e456f06..d00dfc1 100644 --- a/arch/ia64/sn/kernel/setup.c +++ b/arch/ia64/sn/kernel/setup.c @@ -241,7 +241,7 @@ static void __cpuinit sn_check_for_wars(void) * Note: This stuff is duped here because Altix requires the PCDP to * locate a usable VGA device due to lack of proper ACPI support. Structures * could be used from drivers/firmware/pcdp.h, but it was decided that moving - * this file to a more public location just for Altix use was undesireable. + * this file to a more public location just for Altix use was undesirable. */ struct hcdp_uart_desc { diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c index 4add96d..5890897 100644 --- a/arch/m68k/atari/atakeyb.c +++ b/arch/m68k/atari/atakeyb.c @@ -121,7 +121,7 @@ KEYBOARD_STATE kb_state; * bytes have been lost and in which state of the packet structure we are now. * This usually causes keyboards bytes to be interpreted as mouse movements * and vice versa, which is very annoying. It seems better to throw away some - * bytes (that are usually mouse bytes) than to misinterpret them. Therefor I + * bytes (that are usually mouse bytes) than to misinterpret them. Therefore I * introduced the RESYNC state for IKBD data. In this state, the bytes up to * one that really looks like a key event (0x04..0xf2) or the start of a mouse * packet (0xf8..0xfb) are thrown away, but at most 2 bytes. This at least diff --git a/arch/m68k/include/asm/fbio.h b/arch/m68k/include/asm/fbio.h index b9215a0..0a21da8 100644 --- a/arch/m68k/include/asm/fbio.h +++ b/arch/m68k/include/asm/fbio.h @@ -173,7 +173,7 @@ struct mdi_cfginfo { int mdi_ncluts; /* Number of implemented CLUTs in this MDI */ int mdi_type; /* FBTYPE name */ int mdi_height; /* height */ - int mdi_width; /* widht */ + int mdi_width; /* width */ int mdi_size; /* available ram */ int mdi_mode; /* 8bpp, 16bpp or 32bpp */ int mdi_pixfreq; /* pixel clock (from PROM) */ diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h index 359065d5..6e2413e 100644 --- a/arch/m68k/include/asm/io_no.h +++ b/arch/m68k/include/asm/io_no.h @@ -16,7 +16,7 @@ * memory location directly. */ /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates - * two accesses to memory, which may be undesireable for some devices. + * two accesses to memory, which may be undesirable for some devices. */ /* diff --git a/arch/powerpc/boot/dts/kmeter1.dts b/arch/powerpc/boot/dts/kmeter1.dts index 65b8b4f..d8b5d12 100644 --- a/arch/powerpc/boot/dts/kmeter1.dts +++ b/arch/powerpc/boot/dts/kmeter1.dts @@ -490,7 +490,7 @@ compatible = "cfi-flash"; /* * The Intel P30 chip has 2 non-identical chips on - * one die, so we need to define 2 seperate regions + * one die, so we need to define 2 separate regions * that are scanned by physmap_of independantly. */ reg = <0 0x00000000 0x02000000 diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c index 9ddfaef..035ada5 100644 --- a/arch/powerpc/kernel/legacy_serial.c +++ b/arch/powerpc/kernel/legacy_serial.c @@ -469,7 +469,7 @@ static int __init serial_dev_init(void) return -ENODEV; /* - * Before we register the platfrom serial devices, we need + * Before we register the platform serial devices, we need * to fixup their interrupts and their IO ports. */ DBG("Fixing serial ports interrupts and IO ports ...\n"); diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c index 4ec900a..b1dbd9e 100644 --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c @@ -47,7 +47,7 @@ #include "mmu_decl.h" #if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL) -/* The ammount of lowmem must be within 0xF0000000 - KERNELBASE. */ +/* The amount of lowmem must be within 0xF0000000 - KERNELBASE. */ #if (CONFIG_LOWMEM_SIZE > (0xF0000000 - PAGE_OFFSET)) #error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL" #endif diff --git a/arch/s390/crypto/sha_common.c b/arch/s390/crypto/sha_common.c index 7903ec4..f42dbab 100644 --- a/arch/s390/crypto/sha_common.c +++ b/arch/s390/crypto/sha_common.c @@ -79,7 +79,7 @@ int s390_sha_final(struct shash_desc *desc, u8 *out) memset(ctx->buf + index, 0x00, end - index - 8); /* - * Append message length. Well, SHA-512 wants a 128 bit lenght value, + * Append message length. Well, SHA-512 wants a 128 bit length value, * nevertheless we use u64, should be enough for now... */ bits = ctx->count * 8; diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h index e85679a..e34347d 100644 --- a/arch/s390/include/asm/cio.h +++ b/arch/s390/include/asm/cio.h @@ -20,7 +20,7 @@ /** * struct ccw1 - channel command word * @cmd_code: command code - * @flags: flags, like IDA adressing, etc. + * @flags: flags, like IDA addressing, etc. * @count: byte count * @cda: data address * diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S index 27af3bf..2e82fdd 100644 --- a/arch/s390/kernel/sclp.S +++ b/arch/s390/kernel/sclp.S @@ -235,7 +235,7 @@ _sclp_print: lh %r9,0(%r8) # update sccb length ar %r9,%r6 sth %r9,0(%r8) - ar %r7,%r6 # update current mto adress + ar %r7,%r6 # update current mto address ltr %r0,%r0 # more characters? jnz .LinitmtoS4 l %r2,.LwritedataS4-.LbaseS4(%r13)# write data diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c index 83da5de..e9fa1bfe 100644 --- a/arch/sh/kernel/cpu/clock.c +++ b/arch/sh/kernel/cpu/clock.c @@ -404,7 +404,7 @@ EXPORT_SYMBOL_GPL(clk_round_rate); * If an entry has a device ID, it must match * If an entry has a connection ID, it must match * Then we take the most specific entry - with the following - * order of precidence: dev+con > dev only > con only. + * order of precedence: dev+con > dev only > con only. */ static struct clk *clk_find(const char *dev_id, const char *con_id) { diff --git a/arch/sparc/include/asm/fbio.h b/arch/sparc/include/asm/fbio.h index b9215a0..0a21da8 100644 --- a/arch/sparc/include/asm/fbio.h +++ b/arch/sparc/include/asm/fbio.h @@ -173,7 +173,7 @@ struct mdi_cfginfo { int mdi_ncluts; /* Number of implemented CLUTs in this MDI */ int mdi_type; /* FBTYPE name */ int mdi_height; /* height */ - int mdi_width; /* widht */ + int mdi_width; /* width */ int mdi_size; /* available ram */ int mdi_mode; /* 8bpp, 16bpp or 32bpp */ int mdi_pixfreq; /* pixel clock (from PROM) */ diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index 9f2b2ba..b867ab3 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c @@ -1353,7 +1353,7 @@ static void perf_callchain_user_32(struct pt_regs *regs, } /* Like powerpc we can't get PMU interrupts within the PMU handler, - * so no need for seperate NMI and IRQ chains as on x86. + * so no need for separate NMI and IRQ chains as on x86. */ static DEFINE_PER_CPU(struct perf_callchain_entry, callchain); diff --git a/arch/x86/crypto/twofish-i586-asm_32.S b/arch/x86/crypto/twofish-i586-asm_32.S index 39b98ed..575331c 100644 --- a/arch/x86/crypto/twofish-i586-asm_32.S +++ b/arch/x86/crypto/twofish-i586-asm_32.S @@ -22,7 +22,7 @@ #include <asm/asm-offsets.h> -/* return adress at 0 */ +/* return address at 0 */ #define in_blk 12 /* input byte array address parameter*/ #define out_blk 8 /* output byte array address parameter*/ @@ -230,8 +230,8 @@ twofish_enc_blk: push %edi mov tfm + 16(%esp), %ebp /* abuse the base pointer: set new base bointer to the crypto tfm */ - add $crypto_tfm_ctx_offset, %ebp /* ctx adress */ - mov in_blk+16(%esp),%edi /* input adress in edi */ + add $crypto_tfm_ctx_offset, %ebp /* ctx address */ + mov in_blk+16(%esp),%edi /* input address in edi */ mov (%edi), %eax mov b_offset(%edi), %ebx @@ -286,8 +286,8 @@ twofish_dec_blk: mov tfm + 16(%esp), %ebp /* abuse the base pointer: set new base bointer to the crypto tfm */ - add $crypto_tfm_ctx_offset, %ebp /* ctx adress */ - mov in_blk+16(%esp),%edi /* input adress in edi */ + add $crypto_tfm_ctx_offset, %ebp /* ctx address */ + mov in_blk+16(%esp),%edi /* input address in edi */ mov (%edi), %eax mov b_offset(%edi), %ebx diff --git a/arch/x86/crypto/twofish-x86_64-asm_64.S b/arch/x86/crypto/twofish-x86_64-asm_64.S index 35974a5..573aa10 100644 --- a/arch/x86/crypto/twofish-x86_64-asm_64.S +++ b/arch/x86/crypto/twofish-x86_64-asm_64.S @@ -221,11 +221,11 @@ twofish_enc_blk: pushq R1 - /* %rdi contains the crypto tfm adress */ - /* %rsi contains the output adress */ - /* %rdx contains the input adress */ - add $crypto_tfm_ctx_offset, %rdi /* set ctx adress */ - /* ctx adress is moved to free one non-rex register + /* %rdi contains the crypto tfm address */ + /* %rsi contains the output address */ + /* %rdx contains the input address */ + add $crypto_tfm_ctx_offset, %rdi /* set ctx address */ + /* ctx address is moved to free one non-rex register as target for the 8bit high operations */ mov %rdi, %r11 @@ -274,11 +274,11 @@ twofish_enc_blk: twofish_dec_blk: pushq R1 - /* %rdi contains the crypto tfm adress */ - /* %rsi contains the output adress */ - /* %rdx contains the input adress */ - add $crypto_tfm_ctx_offset, %rdi /* set ctx adress */ - /* ctx adress is moved to free one non-rex register + /* %rdi contains the crypto tfm address */ + /* %rsi contains the output address */ + /* %rdx contains the input address */ + add $crypto_tfm_ctx_offset, %rdi /* set ctx address */ + /* ctx address is moved to free one non-rex register as target for the 8bit high operations */ mov %rdi, %r11 diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c index e3c3d82..09d3b17 100644 --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -223,7 +223,7 @@ struct apic apic_flat = { }; /* - * Physflat mode is used when there are more than 8 CPUs on a AMD system. + * Physflat mode is used when there are more than 8 CPUs on a system. * We cannot use logical delivery in this case because the mask * overflows, so use physical mode. */ diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 2d8b503..3d1e6f1 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -27,7 +27,7 @@ #define GET_CR2_INTO_RCX movq %cr2, %rcx #endif -/* we are not able to switch in one step to the final KERNEL ADRESS SPACE +/* we are not able to switch in one step to the final KERNEL ADDRESS SPACE * because we need identity-mapped pages. * */ diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c index 2bbde60..fb99f7e 100644 --- a/arch/x86/kernel/pci-calgary_64.c +++ b/arch/x86/kernel/pci-calgary_64.c @@ -1309,7 +1309,7 @@ static void calgary_init_bitmap_from_tce_table(struct iommu_table *tbl) /* * get_tce_space_from_tar(): * Function for kdump case. Get the tce tables from first kernel - * by reading the contents of the base adress register of calgary iommu + * by reading the contents of the base address register of calgary iommu */ static void __init get_tce_space_from_tar(void) { diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index 1aa966c..a4ac764 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c @@ -38,7 +38,7 @@ int iommu_detected __read_mostly = 0; * This variable becomes 1 if iommu=pt is passed on the kernel command line. * If this variable is 1, IOMMU implementations do no DMA translation for * devices and allow every device to access to whole physical memory. This is - * useful if a user want to use an IOMMU only for KVM device assignment to + * useful if a user wants to use an IOMMU only for KVM device assignment to * guests and not for driver dma translation. */ int iommu_pass_through __read_mostly; diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index 2d96aab..a503b1f 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c @@ -581,7 +581,7 @@ ptrace_modify_breakpoint(struct perf_event *bp, int len, int type, struct perf_event_attr attr; /* - * We shoud have at least an inactive breakpoint at this + * We should have at least an inactive breakpoint at this * slot. It means the user is writing dr7 without having * written the address register first */ diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 208a857..9faf91a 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -50,7 +50,7 @@ u64 native_sched_clock(void) * unstable. We do this because unlike Time Of Day, * the scheduler clock tolerates small errors and it's * very important for it to be as fast as the platform - * can achive it. ) + * can achieve it. ) */ if (unlikely(tsc_disabled)) { /* No locking but a rare wrong value is not a big deal: */ diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c index 2f1ca56..5e1ff66 100644 --- a/arch/x86/kernel/vmiclock_32.c +++ b/arch/x86/kernel/vmiclock_32.c @@ -167,7 +167,7 @@ static int vmi_timer_next_event(unsigned long delta, { /* Unfortunately, set_next_event interface only passes relative * expiry, but we want absolute expiry. It'd be better if were - * were passed an aboslute expiry, since a bunch of time may + * were passed an absolute expiry, since a bunch of time may * have been stolen between the time the delta is computed and * when we set the alarm below. */ cycle_t now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_ONESHOT)); diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c index 563d205..deafb65 100644 --- a/arch/x86/xen/smp.c +++ b/arch/x86/xen/smp.c @@ -361,7 +361,7 @@ static void xen_cpu_die(unsigned int cpu) alternatives_smp_switch(0); } -static void __cpuinit xen_play_dead(void) /* used only with CPU_HOTPLUG */ +static void __cpuinit xen_play_dead(void) /* used only with HOTPLUG_CPU */ { play_dead_common(); HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL); diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index 80d24c4..77fc9f6 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S @@ -104,7 +104,7 @@ * excsave has been restored, and * stack pointer (a1) has been set. * - * Note: _user_exception might be at an odd adress. Don't use call0..call12 + * Note: _user_exception might be at an odd address. Don't use call0..call12 */ ENTRY(user_exception) @@ -244,7 +244,7 @@ _user_exception: * excsave has been restored, and * stack pointer (a1) has been set. * - * Note: _kernel_exception might be at an odd adress. Don't use call0..call12 + * Note: _kernel_exception might be at an odd address. Don't use call0..call12 */ ENTRY(kernel_exception) |