diff options
| author | Will Deacon <will.deacon@arm.com> | 2013-06-12 10:03:30 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2013-08-12 12:25:46 +0100 |
| commit | 6af396a6b6c698eb3834184518fc9a59bc22c817 (patch) | |
| tree | 95c6e58ecf7cd334a5476e14a2fee9d88b8f12b5 /arch | |
| parent | 9781aa8adbc13b9960b5a3a7353efc57eeb3697d (diff) | |
| download | op-kernel-dev-6af396a6b6c698eb3834184518fc9a59bc22c817.zip op-kernel-dev-6af396a6b6c698eb3834184518fc9a59bc22c817.tar.gz | |
ARM: cacheflush: use -ishst dsb variant for ensuring flush completion
flush_cache_vmap contains a dsb to ensure that any cacheflushing
operations to flush out newly written ptes have completed.
This patch adds the -ishst option to the dsb, since that is all that is
required for completing cacheflushing in the inner-shareable domain.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/cacheflush.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 17d0ae8..04d7326 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -352,7 +352,7 @@ static inline void flush_cache_vmap(unsigned long start, unsigned long end) * set_pte_at() called from vmap_pte_range() does not * have a DSB after cleaning the cache line. */ - dsb(); + dsb(ishst); } static inline void flush_cache_vunmap(unsigned long start, unsigned long end) |
