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| author | Roland Stigge <stigge@antcom.de> | 2012-02-27 17:28:03 +0100 |
|---|---|---|
| committer | Roland Stigge <stigge@antcom.de> | 2012-02-27 17:28:03 +0100 |
| commit | ff424aa4c89d19082e8ae5a3351006bc8a4cd91b (patch) | |
| tree | c26dc1510faae92c75e9673a6aabef1bbbe00184 /arch | |
| parent | 2707208ee8a80dbbd5426f5aa1a934f766825bb5 (diff) | |
| download | op-kernel-dev-ff424aa4c89d19082e8ae5a3351006bc8a4cd91b.zip op-kernel-dev-ff424aa4c89d19082e8ae5a3351006bc8a4cd91b.tar.gz | |
ARM: LPC32xx: serial.c: Fixed loop limit
This patch fixes a wrong loop limit on UART init.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Cc: stable@vger.kernel.org
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-lpc32xx/serial.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-lpc32xx/serial.c b/arch/arm/mach-lpc32xx/serial.c index 1a3fd4c..f273528 100644 --- a/arch/arm/mach-lpc32xx/serial.c +++ b/arch/arm/mach-lpc32xx/serial.c @@ -187,7 +187,7 @@ void __init lpc32xx_serial_init(void) /* This needs to be done after all UART clocks are setup */ __raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE); - for (i = 0; i < ARRAY_SIZE(uartinit_data) - 1; i++) { + for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) { /* Force a flush of the RX FIFOs to work around a HW bug */ puart = serial_std_platform_data[i].mapbase; __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart)); |
