diff options
author | Palmer Dabbelt <palmer@dabbelt.com> | 2017-08-02 14:44:50 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-08-02 14:53:16 -0500 |
commit | ecf677c8dcaa7bf13eee31b4d9e4639d559984ad (patch) | |
tree | f831c3251c69bd7b0cb49fecc549ab56846927fd /arch | |
parent | bccf90d6e063d278b9ddc78dd266d0adef29886c (diff) | |
download | op-kernel-dev-ecf677c8dcaa7bf13eee31b4d9e4639d559984ad.zip op-kernel-dev-ecf677c8dcaa7bf13eee31b4d9e4639d559984ad.tar.gz |
PCI: Add a generic weak pcibios_align_resource()
Multiple architectures define this as a trivial function, and I'm adding
another one as part of the RISC-V port. Add a __weak version of
pcibios_align_resource() and delete the now-obselete ones in a handful of
ports.
The only functional change should be that a handful of ports used to export
pcibios_fixup_bus(). Only some architectures export this, so I just
dropped it.
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arc/kernel/pcibios.c | 9 | ||||
-rw-r--r-- | arch/arm64/kernel/pci.c | 9 | ||||
-rw-r--r-- | arch/ia64/pci/pci.c | 7 | ||||
-rw-r--r-- | arch/microblaze/pci/pci-common.c | 7 | ||||
-rw-r--r-- | arch/sparc/kernel/leon_pci.c | 6 | ||||
-rw-r--r-- | arch/sparc/kernel/pci.c | 6 | ||||
-rw-r--r-- | arch/sparc/kernel/pcic.c | 6 | ||||
-rw-r--r-- | arch/tile/kernel/pci.c | 10 | ||||
-rw-r--r-- | arch/tile/kernel/pci_gx.c | 9 |
9 files changed, 0 insertions, 69 deletions
diff --git a/arch/arc/kernel/pcibios.c b/arch/arc/kernel/pcibios.c index 1c8df8f..05aba5a 100644 --- a/arch/arc/kernel/pcibios.c +++ b/arch/arc/kernel/pcibios.c @@ -7,12 +7,3 @@ */ #include <linux/pci.h> - -/* - * We don't have to worry about legacy ISA devices, so nothing to do here - */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index d910512..0e2ea1c 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -22,15 +22,6 @@ #include <linux/pci-ecam.h> #include <linux/slab.h> -/* - * We don't have to worry about legacy ISA devices, so nothing to do here - */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} - #ifdef CONFIG_ACPI /* * Try to assign the IRQ number when probing a new device diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 4068bde..f5ec736 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c @@ -411,13 +411,6 @@ pcibios_disable_device (struct pci_dev *dev) acpi_pci_irq_disable(dev); } -resource_size_t -pcibios_align_resource (void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} - /** * ia64_pci_get_legacy_mem - generic legacy mem routine * @bus: bus to get legacy memory base address for diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c index 940f266..5835c09 100644 --- a/arch/microblaze/pci/pci-common.c +++ b/arch/microblaze/pci/pci-common.c @@ -823,13 +823,6 @@ void pcibios_setup_bus_devices(struct pci_bus *bus) * but we want to try to avoid allocating at 0x2900-0x2bff * which might have be mirrored at 0x0100-0x03ff.. */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} -EXPORT_SYMBOL(pcibios_align_resource); - int pcibios_add_device(struct pci_dev *dev) { dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); diff --git a/arch/sparc/kernel/leon_pci.c b/arch/sparc/kernel/leon_pci.c index 4371f72..0eafdf3 100644 --- a/arch/sparc/kernel/leon_pci.c +++ b/arch/sparc/kernel/leon_pci.c @@ -94,9 +94,3 @@ void pcibios_fixup_bus(struct pci_bus *pbus) } } } - -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c index 78d3dc2..3f8670c 100644 --- a/arch/sparc/kernel/pci.c +++ b/arch/sparc/kernel/pci.c @@ -690,12 +690,6 @@ struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm, return bus; } -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} - int pcibios_enable_device(struct pci_dev *dev, int mask) { u16 cmd, oldcmd; diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c index a38787b..e038e34 100644 --- a/arch/sparc/kernel/pcic.c +++ b/arch/sparc/kernel/pcic.c @@ -746,12 +746,6 @@ static void watchdog_reset() { } #endif -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} - int pcibios_enable_device(struct pci_dev *pdev, int mask) { return 0; diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c index 3113d4d..8999a20 100644 --- a/arch/tile/kernel/pci.c +++ b/arch/tile/kernel/pci.c @@ -67,16 +67,6 @@ static struct pci_ops tile_cfg_ops; /* - * We don't need to worry about the alignment of resources. - */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} -EXPORT_SYMBOL(pcibios_align_resource); - -/* * Open a FD to the hypervisor PCI device. * * controller_id is the controller number, config type is 0 or 1 for diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c index b89172b..0a76421 100644 --- a/arch/tile/kernel/pci_gx.c +++ b/arch/tile/kernel/pci_gx.c @@ -108,15 +108,6 @@ static struct pci_ops tile_cfg_ops; /* Mask of CPUs that should receive PCIe interrupts. */ static struct cpumask intr_cpus_map; -/* We don't need to worry about the alignment of resources. */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, - resource_size_t align) -{ - return res->start; -} -EXPORT_SYMBOL(pcibios_align_resource); - /* * Pick a CPU to receive and handle the PCIe interrupts, based on the IRQ #. * For now, we simply send interrupts to non-dataplane CPUs. |