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authorGilles Espinasse <g.esp@free.fr>2010-03-29 15:41:47 +0200
committerJiri Kosina <jkosina@suse.cz>2010-03-29 15:41:47 +0200
commitf77f13e22df4a40d237697df496152c8c37f3f2b (patch)
treebeccbb0214078d68027f7a17b57be556292475bd /arch
parent5239c4ff4ae9e810ba761518ad71b463f0ccbf3c (diff)
downloadop-kernel-dev-f77f13e22df4a40d237697df496152c8c37f3f2b.zip
op-kernel-dev-f77f13e22df4a40d237697df496152c8c37f3f2b.tar.gz
Fix comment and Kconfig typos for 'require' and 'fragment'
Signed-off-by: Gilles Espinasse <g.esp@free.fr> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c2
-rw-r--r--arch/mips/sibyte/sb1250/irq.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 06e25d9..3fbb033 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -254,7 +254,7 @@ void __init init_bcm1480_irqs(void)
* On the second cpu, everything is set to IP5, which is
* ignored, EXCEPT the mailbox interrupt. That one is
* set to IP[2] so it is handled. This is needed so we
- * can do cross-cpu function calls, as requred by SMP
+ * can do cross-cpu function calls, as required by SMP
*/
#define IMR_IP2_VAL K_BCM1480_INT_MAP_I0
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index ab44a2f..b452e3c 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -237,7 +237,7 @@ void __init init_sb1250_irqs(void)
* On the second cpu, everything is set to IP5, which is
* ignored, EXCEPT the mailbox interrupt. That one is
* set to IP[2] so it is handled. This is needed so we
- * can do cross-cpu function calls, as requred by SMP
+ * can do cross-cpu function calls, as required by SMP
*/
#define IMR_IP2_VAL K_INT_MAP_I0
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