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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-17 09:46:07 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-17 09:46:07 -0700
commit674ff51776b012783e5a0ce8ce2fa56f5fec050c (patch)
tree885be46dfa8a9ca1b45079cf476b478d1d22b795 /arch
parent36a1987cd891fa82d9981886c3abbbe82c428c0d (diff)
parentad3b8a83933e83e5a2a08956211343bda269e778 (diff)
downloadop-kernel-dev-674ff51776b012783e5a0ce8ce2fa56f5fec050c.zip
op-kernel-dev-674ff51776b012783e5a0ce8ce2fa56f5fec050c.tar.gz
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM: SoC fixes from Olof Johansson: "I will stop trying to predict when we're done with fixes for a release. Here's another small batch of three patches for arm-soc: - A fix for a boot time WARN_ON() due to irq domain conversion on PRIMA2 - Fix for a regression in Tegra SMP spinup code due to swapped register offsets - Fixed config dependency for mv_cesa crypto driver to avoid build breakage" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: PRIMA2: fix irq domain size and IRQ mask of internal interrupt controller crypto: mv_cesa requires on CRYPTO_HASH to build ARM: tegra: Fix flow controller accesses
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-prima2/irq.c6
-rw-r--r--arch/arm/mach-tegra/flowctrl.c4
2 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c
index 37c2de9..a7b9415 100644
--- a/arch/arm/mach-prima2/irq.c
+++ b/arch/arm/mach-prima2/irq.c
@@ -42,7 +42,8 @@ sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
static __init void sirfsoc_irq_init(void)
{
sirfsoc_alloc_gc(sirfsoc_intc_base, 0, 32);
- sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32, SIRFSOC_INTENAL_IRQ_END - 32);
+ sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32,
+ SIRFSOC_INTENAL_IRQ_END + 1 - 32);
writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL0);
writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL1);
@@ -68,7 +69,8 @@ void __init sirfsoc_of_irq_init(void)
if (!sirfsoc_intc_base)
panic("unable to map intc cpu registers\n");
- irq_domain_add_legacy(np, 32, 0, 0, &irq_domain_simple_ops, NULL);
+ irq_domain_add_legacy(np, SIRFSOC_INTENAL_IRQ_END + 1, 0, 0,
+ &irq_domain_simple_ops, NULL);
of_node_put(np);
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c
index fef66a7..f07488e 100644
--- a/arch/arm/mach-tegra/flowctrl.c
+++ b/arch/arm/mach-tegra/flowctrl.c
@@ -53,10 +53,10 @@ static void flowctrl_update(u8 offset, u32 value)
void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
{
- return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
+ return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
}
void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)
{
- return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
+ return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
}
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