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author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2011-12-09 13:38:00 -0800 |
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committer | Tony Lindgren <tony@atomide.com> | 2011-12-09 13:38:00 -0800 |
commit | 7ba966804f58ccd81375827a71222efaa131aa70 (patch) | |
tree | 8d8b39fe1c77a937174b9d604f8cc554d18d4366 /arch | |
parent | 5611cc4572e889b62a7b4c72a413536bf6a9c416 (diff) | |
download | op-kernel-dev-7ba966804f58ccd81375827a71222efaa131aa70.zip op-kernel-dev-7ba966804f58ccd81375827a71222efaa131aa70.tar.gz |
ARM: OMAP2+: DMA: Workaround for invalid source position
If the DMA source position has been asked before the
first actual data transfer has been done, the CSAC
register does not contain valid information.
We can identify this situation by checking the CDAC
register:
CDAC != 0 indicates that the DMA transfer on the channel has
been started already.
When CDAC == 0 we can not trust the CSAC value since it has
not been updated, and can contain random number.
Return the start address in case the DMA has not jet started.
Note: The CDAC register has been initialized to 0 at dma_start
time.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/plat-omap/dma.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index c22217c..a9983b6 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -1034,6 +1034,18 @@ dma_addr_t omap_get_dma_src_pos(int lch) if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0) offset = p->dma_read(CSAC, lch); + if (!cpu_is_omap15xx()) { + /* + * CDAC == 0 indicates that the DMA transfer on the channel has + * not been started (no data has been transferred so far). + * Return the programmed source start address in this case. + */ + if (likely(p->dma_read(CDAC, lch))) + offset = p->dma_read(CSAC, lch); + else + offset = p->dma_read(CSSA, lch); + } + if (cpu_class_is_omap1()) offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000); |