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authorGreg Ungerer <gerg@uclinux.org>2011-03-06 00:13:17 +1000
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 21:01:54 +1000
commit9a6b0c73afa702eee1803e664eae1b951faf895c (patch)
tree854f1d2df6e034d4c2569dd565f5a3ed2af2e141 /arch
parentb62384afddbe7173b08420c67e6cbb22aa1ba709 (diff)
downloadop-kernel-dev-9a6b0c73afa702eee1803e664eae1b951faf895c.zip
op-kernel-dev-9a6b0c73afa702eee1803e664eae1b951faf895c.tar.gz
m68knommu: remove use of MBAR value for ColdFire 527x peripheral addressing
The ColdFire 527x family of CPUs does not have an MBAR register, so don't define its peripheral addresses relative to one. Its internal peripherals are relative to the IPSBAR register, so make sure to use that. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/m68k/include/asm/m527xsim.h14
-rw-r--r--arch/m68knommu/platform/527x/config.c14
2 files changed, 18 insertions, 10 deletions
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index cb7df04..d299552 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -63,9 +63,17 @@
/*
* UART module.
*/
-#define MCFUART_BASE1 0x200 /* Base address of UART1 */
-#define MCFUART_BASE2 0x240 /* Base address of UART2 */
-#define MCFUART_BASE3 0x280 /* Base address of UART3 */
+#define MCFUART_BASE1 (MCF_IPSBAR + 0x200)
+#define MCFUART_BASE2 (MCF_IPSBAR + 0x240)
+#define MCFUART_BASE3 (MCF_IPSBAR + 0x280)
+
+/*
+ * FEC ethernet module.
+ */
+#define MCFFEC_BASE0 (MCF_IPSBAR + 0x1000)
+#define MCFFEC_SIZE0 0x800
+#define MCFFEC_BASE1 (MCF_IPSBAR + 0x1800)
+#define MCFFEC_SIZE1 0x800
#ifdef CONFIG_M5271
#define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000)
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c
index 3d9c35c..fa35959 100644
--- a/arch/m68knommu/platform/527x/config.c
+++ b/arch/m68knommu/platform/527x/config.c
@@ -28,15 +28,15 @@
static struct mcf_platform_uart m527x_uart_platform[] = {
{
- .mapbase = MCF_MBAR + MCFUART_BASE1,
+ .mapbase = MCFUART_BASE1,
.irq = MCFINT_VECBASE + MCFINT_UART0,
},
{
- .mapbase = MCF_MBAR + MCFUART_BASE2,
+ .mapbase = MCFUART_BASE2,
.irq = MCFINT_VECBASE + MCFINT_UART1,
},
{
- .mapbase = MCF_MBAR + MCFUART_BASE3,
+ .mapbase = MCFUART_BASE3,
.irq = MCFINT_VECBASE + MCFINT_UART2,
},
{ },
@@ -50,8 +50,8 @@ static struct platform_device m527x_uart = {
static struct resource m527x_fec0_resources[] = {
{
- .start = MCF_MBAR + 0x1000,
- .end = MCF_MBAR + 0x1000 + 0x7ff,
+ .start = MCFFEC_BASE0,
+ .end = MCFFEC_BASE0 + MCFFEC_SIZE0 - 1,
.flags = IORESOURCE_MEM,
},
{
@@ -73,8 +73,8 @@ static struct resource m527x_fec0_resources[] = {
static struct resource m527x_fec1_resources[] = {
{
- .start = MCF_MBAR + 0x1800,
- .end = MCF_MBAR + 0x1800 + 0x7ff,
+ .start = MCFFEC_BASE1,
+ .end = MCFFEC_BASE1 + MCFFEC_SIZE1 - 1,
.flags = IORESOURCE_MEM,
},
{
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