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authorJuha Yrjola <juha.yrjola@solidboot.com>2006-09-25 12:41:44 +0300
committerTony Lindgren <tony@atomide.com>2006-09-25 12:41:44 +0300
commit39020842b3d8a450e80724a71d5df676535d249e (patch)
treeca33882d0d89ba97c864c17ec950b7c1ef8c1212 /arch
parentab0a2b9b9f536d860681dacbfb5784bd76e88a1e (diff)
downloadop-kernel-dev-39020842b3d8a450e80724a71d5df676535d249e.zip
op-kernel-dev-39020842b3d8a450e80724a71d5df676535d249e.tar.gz
ARM: OMAP: OMAP2 dmtimer power management support
GPT1 will be set into non-posted mode, and the wakeup register is set for all timers. Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-omap/dmtimer.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 8d61974..bcbb8d7 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -161,7 +161,7 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
{
u32 l;
- if (timer != &dm_timers[0]) {
+ if (!cpu_class_is_omap2() || timer != &dm_timers[0]) {
omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
omap_dm_timer_wait_for_reset(timer);
}
@@ -170,6 +170,13 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
/* Set to smart-idle mode */
l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG);
l |= 0x02 << 3;
+
+ if (cpu_class_is_omap2() && timer == &dm_timers[0]) {
+ /* Enable wake-up only for GPT1 on OMAP2 CPUs*/
+ l |= 1 << 2;
+ /* Non-posted mode */
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0);
+ }
omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
}
@@ -431,6 +438,7 @@ void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
unsigned int value)
{
omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value);
+ omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value);
}
unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
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