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authorGrant Likely <grant.likely@secretlab.ca>2007-10-21 10:52:02 -0600
committerGrant Likely <grant.likely@secretlab.ca>2007-10-21 10:52:02 -0600
commitc052a22e808fc1f9b78b9a2fe7065f2026815128 (patch)
tree9006ac29826e6cbb729175a62cb505f542223c2a /arch
parent2fb59d623ad85dfdb8ce03a660051743f7361896 (diff)
downloadop-kernel-dev-c052a22e808fc1f9b78b9a2fe7065f2026815128.zip
op-kernel-dev-c052a22e808fc1f9b78b9a2fe7065f2026815128.tar.gz
[POWERPC] bestcomm: Restrict bus prefetch bugfix to original mpc5200 silicon.
Only the MPC5200 needs this bug fix. MPC5200B is okay. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/sysdev/bestcomm/bestcomm.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.c b/arch/powerpc/sysdev/bestcomm/bestcomm.c
index 48492a8..740ad73 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.c
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm.c
@@ -269,6 +269,7 @@ bcom_engine_init(void)
int task;
phys_addr_t tdt_pa, ctx_pa, var_pa, fdt_pa;
unsigned int tdt_size, ctx_size, var_size, fdt_size;
+ u16 regval;
/* Allocate & clear SRAM zones for FDT, TDTs, contexts and vars/incs */
tdt_size = BCOM_MAX_TASKS * sizeof(struct bcom_tdt);
@@ -319,9 +320,11 @@ bcom_engine_init(void)
/* Init 'always' initiator */
out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_ALWAYS], BCOM_IPR_ALWAYS);
- /* Disable COMM Bus Prefetch, apparently it's not reliable yet */
- /* FIXME: This should be done on 5200 and not 5200B ... */
- out_be16(&bcom_eng->regs->PtdCntrl, in_be16(&bcom_eng->regs->PtdCntrl) | 1);
+ /* Disable COMM Bus Prefetch on the original 5200; it's broken */
+ if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR) {
+ regval = in_be16(&bcom_eng->regs->PtdCntrl);
+ out_be16(&bcom_eng->regs->PtdCntrl, regval | 1);
+ }
/* Init lock */
spin_lock_init(&bcom_eng->lock);
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