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authorShengjiu Wang <shengjiu.wang@freescale.com>2014-09-04 17:48:58 +0800
committerShawn Guo <shawn.guo@freescale.com>2014-09-16 10:06:47 +0800
commitaec247d4ac578693ee75ac2bf10eac1c29299c45 (patch)
tree43ea4eacbe55e7f25ad6b5d8bce54f691e92f5a7 /arch
parente37c1ad0327af0639f6358357f60f6209f8bbad6 (diff)
downloadop-kernel-dev-aec247d4ac578693ee75ac2bf10eac1c29299c45.zip
op-kernel-dev-aec247d4ac578693ee75ac2bf10eac1c29299c45.tar.gz
ARM: clk-imx6q: refine clock tree for ASRC
ASRC has "asrc", "asrc_ipg", "asrc_mem" clocks, and they share the same gate bits. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 2edcebf..d5bf1e2 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -107,6 +107,7 @@ static struct clk_div_table video_div_table[] = {
};
static unsigned int share_count_esai;
+static unsigned int share_count_asrc;
static void __init imx6q_clocks_init(struct device_node *ccm_node)
{
@@ -317,7 +318,9 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
/* name parent_name reg shift */
clk[IMX6QDL_CLK_APBH_DMA] = imx_clk_gate2("apbh_dma", "usdhc3", base + 0x68, 4);
- clk[IMX6QDL_CLK_ASRC] = imx_clk_gate2("asrc", "asrc_podf", base + 0x68, 6);
+ clk[IMX6QDL_CLK_ASRC] = imx_clk_gate2_shared("asrc", "asrc_podf", base + 0x68, 6, &share_count_asrc);
+ clk[IMX6QDL_CLK_ASRC_IPG] = imx_clk_gate2_shared("asrc_ipg", "ahb", base + 0x68, 6, &share_count_asrc);
+ clk[IMX6QDL_CLK_ASRC_MEM] = imx_clk_gate2_shared("asrc_mem", "ahb", base + 0x68, 6, &share_count_asrc);
clk[IMX6QDL_CLK_CAN1_IPG] = imx_clk_gate2("can1_ipg", "ipg", base + 0x68, 14);
clk[IMX6QDL_CLK_CAN1_SERIAL] = imx_clk_gate2("can1_serial", "can_root", base + 0x68, 16);
clk[IMX6QDL_CLK_CAN2_IPG] = imx_clk_gate2("can2_ipg", "ipg", base + 0x68, 18);
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