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authorChuck Meade <chuckmeade@mindspring.com>2007-03-27 10:46:10 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-03-29 14:33:42 -0500
commit7f013bc9d05825b19433bc0deb1f5f4d2103726e (patch)
tree3f5b69fe7ea4cdffa6c48c5953b17a4890ace625 /arch
parent399afa4fc9238fbae42116cf25a54671c0e8f56e (diff)
downloadop-kernel-dev-7f013bc9d05825b19433bc0deb1f5f4d2103726e.zip
op-kernel-dev-7f013bc9d05825b19433bc0deb1f5f4d2103726e.tar.gz
[POWERPC] qe: Fix QUICC Engine SDMA setup errors
Correct the alignment of the internal buffer used by the QUICC Engine SDMA controller to 4Kbytes. Correct the shift direction in the logic that sets up the SDMR register for the QUICC Engine SDMA controller. Signed-off-by: Chuck Meade <chuckmeade@mindspring.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index e3d71e0..43f6cc9 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -251,13 +251,13 @@ static int qe_sdma_init(void)
/* allocate 2 internal temporary buffers (512 bytes size each) for
* the SDMA */
- sdma_buf_offset = qe_muram_alloc(512 * 2, 64);
+ sdma_buf_offset = qe_muram_alloc(512 * 2, 4096);
if (IS_MURAM_ERR(sdma_buf_offset))
return -ENOMEM;
out_be32(&sdma->sdebcr, sdma_buf_offset & QE_SDEBCR_BA_MASK);
- out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK | (0x1 >>
- QE_SDMR_CEN_SHIFT)));
+ out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK |
+ (0x1 << QE_SDMR_CEN_SHIFT)));
return 0;
}
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