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authorIshizaki Kou <kou.ishizaki@toshiba.co.jp>2007-05-09 17:34:08 +1000
committerPaul Mackerras <paulus@samba.org>2007-05-10 21:28:12 +1000
commitd1af5b4ea970d8cccdacf243ae42899f3784ad85 (patch)
treeda096a38fb579699086c2dbe8f7329379ebd7fe2 /arch
parentab5570f093585a124cd440f5229393e36c5d600e (diff)
downloadop-kernel-dev-d1af5b4ea970d8cccdacf243ae42899f3784ad85.zip
op-kernel-dev-d1af5b4ea970d8cccdacf243ae42899f3784ad85.tar.gz
[POWERPC] celleb: Fix support for multiple PCI domains
Celleb has multiple PCI host bridges (phbs). Previous boot logic gives non-overlapped bus IDs between PCI host bridges so you can identify PHB by bus ID. But newer boot logic gives same bus ID between PHBs (it gives bus ID 0 as root bus.) So we have to set 'phb->buid' as non-zero. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/celleb/pci.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/celleb/pci.c b/arch/powerpc/platforms/celleb/pci.c
index d1adf34..e9ac19c 100644
--- a/arch/powerpc/platforms/celleb/pci.c
+++ b/arch/powerpc/platforms/celleb/pci.c
@@ -457,6 +457,7 @@ int __devinit celleb_setup_phb(struct pci_controller *phb)
pr_debug("PCI: celleb_setup_phb() %s\n", name);
phb_set_bus_ranges(dev, phb);
+ phb->buid = 1;
if (strcmp(name, "epci") == 0) {
phb->ops = &celleb_epci_ops;
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