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authorIngo Molnar <mingo@elte.hu>2009-02-05 14:33:31 +0100
committerIngo Molnar <mingo@elte.hu>2009-02-05 14:33:31 +0100
commit43769f10b4826376cbf4ce17af74a5b4e8dc4fcd (patch)
tree8a7f36985f9ef8e6771163c751eeefd22ee71693 /arch
parentae7462b4f1fe1f36b5d562dbd5202a2eba01f072 (diff)
parenteda58a85ec3fc05855a26654d97a2b53f0e715b9 (diff)
downloadop-kernel-dev-43769f10b4826376cbf4ce17af74a5b4e8dc4fcd.zip
op-kernel-dev-43769f10b4826376cbf4ce17af74a5b4e8dc4fcd.tar.gz
Merge branches 'tracing/ftrace' and 'linus' into tracing/core
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/kernel/entry-armv.S1
-rw-r--r--arch/arm/kernel/entry-common.S2
-rw-r--r--arch/arm/kernel/irq.c2
-rw-r--r--arch/arm/mach-msm/board-halibut.c1
-rw-r--r--arch/arm/mach-omap1/devices.c2
-rw-r--r--arch/arm/mach-omap1/mcbsp.c98
-rw-r--r--arch/arm/mach-omap2/devices.c11
-rw-r--r--arch/arm/mach-omap2/id.c6
-rw-r--r--arch/arm/mach-omap2/irq.c1
-rw-r--r--arch/arm/mach-omap2/mcbsp.c145
-rw-r--r--arch/arm/mach-omap2/sleep24xx.S3
-rw-r--r--arch/arm/mach-omap2/timer-gp.c3
-rw-r--r--arch/arm/mach-sa1100/generic.c2
-rw-r--r--arch/arm/mm/fault-armv.c5
-rw-r--r--arch/arm/plat-omap/devices.c7
-rw-r--r--arch/arm/plat-omap/dma.c5
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h1
-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h6
-rw-r--r--arch/arm/plat-omap/include/mach/mmc.h10
-rw-r--r--arch/arm/plat-omap/mcbsp.c52
-rw-r--r--arch/blackfin/Kconfig52
-rw-r--r--arch/blackfin/Makefile106
-rw-r--r--arch/blackfin/configs/BF518F-EZBRD_defconfig9
-rw-r--r--arch/blackfin/configs/BF526-EZBRD_defconfig2
-rw-r--r--arch/blackfin/configs/BF527-EZKIT_defconfig2
-rw-r--r--arch/blackfin/configs/BF533-EZKIT_defconfig2
-rw-r--r--arch/blackfin/configs/BF533-STAMP_defconfig2
-rw-r--r--arch/blackfin/configs/BF537-STAMP_defconfig2
-rw-r--r--arch/blackfin/configs/BF538-EZKIT_defconfig2
-rw-r--r--arch/blackfin/configs/BF548-EZKIT_defconfig2
-rw-r--r--arch/blackfin/configs/BF561-EZKIT_defconfig2
-rw-r--r--arch/blackfin/configs/CM-BF527_defconfig445
-rw-r--r--arch/blackfin/include/asm/checksum.h34
-rw-r--r--arch/blackfin/include/asm/delay.h35
-rw-r--r--arch/blackfin/include/asm/gpio.h58
-rw-r--r--arch/blackfin/include/asm/kgdb.h53
-rw-r--r--arch/blackfin/include/asm/mem_init.h2
-rw-r--r--arch/blackfin/include/asm/pda.h1
-rw-r--r--arch/blackfin/include/asm/reboot.h2
-rw-r--r--arch/blackfin/kernel/Makefile2
-rw-r--r--arch/blackfin/kernel/bfin_dma_5xx.c7
-rw-r--r--arch/blackfin/kernel/bfin_gpio.c578
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbinit.c4
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbmgr.c12
-rw-r--r--arch/blackfin/kernel/irqchip.c8
-rw-r--r--arch/blackfin/kernel/reboot.c30
-rw-r--r--arch/blackfin/kernel/setup.c12
-rw-r--r--arch/blackfin/kernel/traps.c39
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c59
-rw-r--r--arch/blackfin/mach-bf518/include/mach/portmux.h2
-rw-r--r--arch/blackfin/mach-bf527/boards/cm_bf527.c18
-rw-r--r--arch/blackfin/mach-bf527/boards/ezbrd.c18
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c18
-rw-r--r--arch/blackfin/mach-bf527/include/mach/portmux.h2
-rw-r--r--arch/blackfin/mach-bf533/boards/blackstamp.c4
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c4
-rw-r--r--arch/blackfin/mach-bf533/include/mach/portmux.h5
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c6
-rw-r--r--arch/blackfin/mach-bf537/boards/generic_board.c12
-rw-r--r--arch/blackfin/mach-bf537/boards/minotaur.c8
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c10
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c14
-rw-r--r--arch/blackfin/mach-bf537/boards/tcm_bf537.c10
-rw-r--r--arch/blackfin/mach-bf537/include/mach/portmux.h1
-rw-r--r--arch/blackfin/mach-bf538/include/mach/portmux.h1
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c4
-rw-r--r--arch/blackfin/mach-bf548/include/mach/anomaly.h1
-rw-r--r--arch/blackfin/mach-bf548/include/mach/bf548.h12
-rw-r--r--arch/blackfin/mach-bf548/include/mach/gpio.h12
-rw-r--r--arch/blackfin/mach-bf548/include/mach/portmux.h1
-rw-r--r--arch/blackfin/mach-bf561/include/mach/defBF561.h2
-rw-r--r--arch/blackfin/mach-bf561/include/mach/portmux.h1
-rw-r--r--arch/blackfin/mach-common/clocks-init.c3
-rw-r--r--arch/blackfin/mach-common/entry.S9
-rw-r--r--arch/blackfin/mach-common/head.S84
-rw-r--r--arch/blackfin/mach-common/interrupt.S2
-rw-r--r--arch/blackfin/mach-common/ints-priority.c11
-rw-r--r--arch/blackfin/mach-common/pm.c11
-rw-r--r--arch/sparc/include/asm/cpudata_64.h2
-rw-r--r--arch/sparc/include/asm/irq_64.h4
-rw-r--r--arch/sparc/include/asm/kdebug_64.h2
-rw-r--r--arch/sparc/include/asm/nmi.h10
-rw-r--r--arch/sparc/include/asm/pcr.h46
-rw-r--r--arch/sparc/include/asm/pil.h1
-rw-r--r--arch/sparc/kernel/Makefile2
-rw-r--r--arch/sparc/kernel/cpu.c33
-rw-r--r--arch/sparc/kernel/irq_64.c68
-rw-r--r--arch/sparc/kernel/kernel.h1
-rw-r--r--arch/sparc/kernel/nmi.c224
-rw-r--r--arch/sparc/kernel/pcr.c153
-rw-r--r--arch/sparc/kernel/process_64.c5
-rw-r--r--arch/sparc/kernel/setup_64.c2
-rw-r--r--arch/sparc/kernel/ttable.S3
-rw-r--r--arch/sparc/mm/fault_64.c44
-rw-r--r--arch/sparc/oprofile/init.c232
95 files changed, 1650 insertions, 1395 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 77b0474..85040cf 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -650,6 +650,7 @@ ENTRY(fp_enter)
no_fp: mov pc, lr
__und_usr_unknown:
+ enable_irq
mov r0, sp
adr lr, ret_from_exception
b do_undefinstr
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 06269ea..49a6ba9 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -136,7 +136,7 @@ ENTRY(mcount)
ldmia sp!, {r0-r3, pc}
trace:
- ldr r1, [fp, #-4]
+ ldr r1, [fp, #-4] @ lr of instrumented routine
mov r0, lr
sub r0, r0, #MCOUNT_INSN_SIZE
mov lr, pc
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 7141cee..363db18 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -101,7 +101,7 @@ unlock:
/* Handle bad interrupts */
static struct irq_desc bad_irq_desc = {
.handle_irq = handle_bad_irq,
- .lock = SPIN_LOCK_UNLOCKED
+ .lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock),
};
/*
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index c2a96e3..e61967d 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -27,6 +27,7 @@
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
+#include <mach/irqs.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 77382d8..ba5d7c0 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -181,7 +181,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
}
size = OMAP1_MMC_SIZE;
- omap_mmc_add(i, base, size, irq, mmc_data[i]);
+ omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]);
};
}
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index ca7a0cc..575ba31 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -28,81 +28,8 @@
#define DPS_RSTCT2_PER_EN (1 << 0)
#define DSP_RSTCT2_WD_PER_EN (1 << 1)
-struct mcbsp_internal_clk {
- struct clk clk;
- struct clk **childs;
- int n_childs;
-};
-
#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
-static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
-{
- const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
- int i;
-
- mclk->n_childs = ARRAY_SIZE(clk_names);
- mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
- GFP_KERNEL);
-
- for (i = 0; i < mclk->n_childs; i++) {
- /* We fake a platform device to get correct device id */
- struct platform_device pdev;
-
- pdev.dev.bus = &platform_bus_type;
- pdev.id = mclk->clk.id;
- mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
- if (IS_ERR(mclk->childs[i]))
- printk(KERN_ERR "Could not get clock %s (%d).\n",
- clk_names[i], mclk->clk.id);
- }
-}
-
-static int omap_mcbsp_clk_enable(struct clk *clk)
-{
- struct mcbsp_internal_clk *mclk = container_of(clk,
- struct mcbsp_internal_clk, clk);
- int i;
-
- for (i = 0; i < mclk->n_childs; i++)
- clk_enable(mclk->childs[i]);
- return 0;
-}
-
-static void omap_mcbsp_clk_disable(struct clk *clk)
-{
- struct mcbsp_internal_clk *mclk = container_of(clk,
- struct mcbsp_internal_clk, clk);
- int i;
-
- for (i = 0; i < mclk->n_childs; i++)
- clk_disable(mclk->childs[i]);
-}
-
-static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
- {
- .clk = {
- .name = "mcbsp_clk",
- .id = 1,
- .enable = omap_mcbsp_clk_enable,
- .disable = omap_mcbsp_clk_disable,
- },
- },
- {
- .clk = {
- .name = "mcbsp_clk",
- .id = 3,
- .enable = omap_mcbsp_clk_enable,
- .disable = omap_mcbsp_clk_disable,
- },
- },
-};
-
-#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
-#else
-#define omap_mcbsp_clks_size 0
-static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
-static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
-{ }
+const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
#endif
static void omap1_mcbsp_request(unsigned int id)
@@ -167,8 +94,9 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP1RX,
.tx_irq = INT_McBSP1TX,
.ops = &omap1_mcbsp_ops,
- .clk_name = "mcbsp_clk",
- },
+ .clk_names = clk_names,
+ .num_clks = 3,
+ },
{
.phys_base = OMAP1510_MCBSP2_BASE,
.dma_rx_sync = OMAP_DMA_MCBSP2_RX,
@@ -184,7 +112,8 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP3RX,
.tx_irq = INT_McBSP3TX,
.ops = &omap1_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 3,
},
};
#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
@@ -202,7 +131,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP1RX,
.tx_irq = INT_McBSP1TX,
.ops = &omap1_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 3,
},
{
.phys_base = OMAP1610_MCBSP2_BASE,
@@ -219,7 +149,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
.rx_irq = INT_McBSP3RX,
.tx_irq = INT_McBSP3TX,
.ops = &omap1_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 3,
},
};
#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
@@ -230,15 +161,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
int __init omap1_mcbsp_init(void)
{
- int i;
-
- for (i = 0; i < omap_mcbsp_clks_size; i++) {
- if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
- omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
- clk_register(&omap_mcbsp_clks[i].clk);
- }
- }
-
if (cpu_is_omap730())
omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
if (cpu_is_omap15xx())
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 9d7216f..ce03fa7 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -421,6 +421,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
int nr_controllers)
{
int i;
+ char *name;
for (i = 0; i < nr_controllers; i++) {
unsigned long base, size;
@@ -450,12 +451,14 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
continue;
}
- if (cpu_is_omap2420())
+ if (cpu_is_omap2420()) {
size = OMAP2420_MMC_SIZE;
- else
+ name = "mmci-omap";
+ } else {
size = HSMMC_SIZE;
-
- omap_mmc_add(i, base, size, irq, mmc_data[i]);
+ name = "mmci-omap-hs";
+ }
+ omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
};
}
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index b0f8e7d..b52a02f 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -172,9 +172,13 @@ void __init omap34xx_check_revision(void)
omap_revision = OMAP3430_REV_ES3_0;
rev_name = "ES3.0";
break;
+ case 4:
+ omap_revision = OMAP3430_REV_ES3_1;
+ rev_name = "ES3.1";
+ break;
default:
/* Use the latest known revision as default */
- omap_revision = OMAP3430_REV_ES3_0;
+ omap_revision = OMAP3430_REV_ES3_1;
rev_name = "Unknown revision\n";
}
}
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 636e282..9ba20d9 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -134,6 +134,7 @@ static struct irq_chip omap_irq_chip = {
.ack = omap_mask_ack_irq,
.mask = omap_mask_irq,
.unmask = omap_unmask_irq,
+ .disable = omap_mask_irq,
};
static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index e20023c..a9e631f 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -24,106 +24,7 @@
#include <mach/cpu.h>
#include <mach/mcbsp.h>
-struct mcbsp_internal_clk {
- struct clk clk;
- struct clk **childs;
- int n_childs;
-};
-
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
-static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
-{
- const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
- int i;
-
- mclk->n_childs = ARRAY_SIZE(clk_names);
- mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
- GFP_KERNEL);
-
- for (i = 0; i < mclk->n_childs; i++) {
- /* We fake a platform device to get correct device id */
- struct platform_device pdev;
-
- pdev.dev.bus = &platform_bus_type;
- pdev.id = mclk->clk.id;
- mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
- if (IS_ERR(mclk->childs[i]))
- printk(KERN_ERR "Could not get clock %s (%d).\n",
- clk_names[i], mclk->clk.id);
- }
-}
-
-static int omap_mcbsp_clk_enable(struct clk *clk)
-{
- struct mcbsp_internal_clk *mclk = container_of(clk,
- struct mcbsp_internal_clk, clk);
- int i;
-
- for (i = 0; i < mclk->n_childs; i++)
- clk_enable(mclk->childs[i]);
- return 0;
-}
-
-static void omap_mcbsp_clk_disable(struct clk *clk)
-{
- struct mcbsp_internal_clk *mclk = container_of(clk,
- struct mcbsp_internal_clk, clk);
- int i;
-
- for (i = 0; i < mclk->n_childs; i++)
- clk_disable(mclk->childs[i]);
-}
-
-static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
- {
- .clk = {
- .name = "mcbsp_clk",
- .id = 1,
- .enable = omap_mcbsp_clk_enable,
- .disable = omap_mcbsp_clk_disable,
- },
- },
- {
- .clk = {
- .name = "mcbsp_clk",
- .id = 2,
- .enable = omap_mcbsp_clk_enable,
- .disable = omap_mcbsp_clk_disable,
- },
- },
- {
- .clk = {
- .name = "mcbsp_clk",
- .id = 3,
- .enable = omap_mcbsp_clk_enable,
- .disable = omap_mcbsp_clk_disable,
- },
- },
- {
- .clk = {
- .name = "mcbsp_clk",
- .id = 4,
- .enable = omap_mcbsp_clk_enable,
- .disable = omap_mcbsp_clk_disable,
- },
- },
- {
- .clk = {
- .name = "mcbsp_clk",
- .id = 5,
- .enable = omap_mcbsp_clk_enable,
- .disable = omap_mcbsp_clk_disable,
- },
- },
-};
-
-#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
-#else
-#define omap_mcbsp_clks_size 0
-static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
-static inline void omap_mcbsp_clk_init(struct clk *clk)
-{ }
-#endif
+const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
static void omap2_mcbsp2_mux_setup(void)
{
@@ -156,7 +57,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
{
.phys_base = OMAP24XX_MCBSP2_BASE,
@@ -165,7 +67,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
};
#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
@@ -183,7 +86,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
{
.phys_base = OMAP24XX_MCBSP2_BASE,
@@ -192,7 +96,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
{
.phys_base = OMAP2430_MCBSP3_BASE,
@@ -201,7 +106,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
{
.phys_base = OMAP2430_MCBSP4_BASE,
@@ -210,7 +116,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
{
.phys_base = OMAP2430_MCBSP5_BASE,
@@ -219,7 +126,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
};
#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
@@ -237,7 +145,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP2_BASE,
@@ -246,7 +155,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP3_BASE,
@@ -255,7 +165,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP4_BASE,
@@ -264,7 +175,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
{
.phys_base = OMAP34XX_MCBSP5_BASE,
@@ -273,7 +185,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
.rx_irq = INT_24XX_MCBSP5_IRQ_RX,
.tx_irq = INT_24XX_MCBSP5_IRQ_TX,
.ops = &omap2_mcbsp_ops,
- .clk_name = "mcbsp_clk",
+ .clk_names = clk_names,
+ .num_clks = 2,
},
};
#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
@@ -284,14 +197,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
static int __init omap2_mcbsp_init(void)
{
- int i;
-
- for (i = 0; i < omap_mcbsp_clks_size; i++) {
- /* Once we call clk_get inside init, we do not register it */
- omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
- clk_register(&omap_mcbsp_clks[i].clk);
- }
-
if (cpu_is_omap2420())
omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
if (cpu_is_omap2430())
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S
index 43336b9..bf9e961 100644
--- a/arch/arm/mach-omap2/sleep24xx.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -93,9 +93,8 @@ ENTRY(omap24xx_cpu_suspend)
orr r4, r4, #0x40 @ enable self refresh on idle req
mov r5, #0x2000 @ set delay (DPLL relock + DLL relock)
str r4, [r2] @ make it so
- mov r2, #0
nop
- mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt
+ mcr p15, 0, r3, c7, c0, 4 @ wait for interrupt
nop
loop:
subs r5, r5, #0x1 @ awake, wait just a bit
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index ae60363..9fc13a2 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -118,7 +118,8 @@ static void __init omap2_gp_clockevent_init(void)
clockevent_gpt.max_delta_ns =
clockevent_delta2ns(0xffffffff, &clockevent_gpt);
clockevent_gpt.min_delta_ns =
- clockevent_delta2ns(1, &clockevent_gpt);
+ clockevent_delta2ns(3, &clockevent_gpt);
+ /* Timer internal resynch latency. */
clockevent_gpt.cpumask = cpumask_of(0);
clockevents_register_device(&clockevent_gpt);
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index c1fbd5b..23cfdd5 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -289,7 +289,7 @@ static struct platform_device sa11x0pcmcia_device = {
};
static struct platform_device sa11x0mtd_device = {
- .name = "flash",
+ .name = "sa1100-mtd",
.id = -1,
};
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index 81d0b87..bc0099d 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -66,7 +66,10 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
* fault (ie, is old), we can safely ignore any issues.
*/
if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
- flush_cache_page(vma, address, pte_pfn(entry));
+ unsigned long pfn = pte_pfn(entry);
+ flush_cache_page(vma, address, pfn);
+ outer_flush_range((pfn << PAGE_SHIFT),
+ (pfn << PAGE_SHIFT) + PAGE_SIZE);
pte_val(entry) &= ~L_PTE_MT_MASK;
pte_val(entry) |= shared_pte_mask;
set_pte_at(vma->vm_mm, address, pte, entry);
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index ac15c23..208dbb1 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -200,14 +200,15 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
/*
* Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
*/
-int __init omap_mmc_add(int id, unsigned long base, unsigned long size,
- unsigned int irq, struct omap_mmc_platform_data *data)
+int __init omap_mmc_add(const char *name, int id, unsigned long base,
+ unsigned long size, unsigned int irq,
+ struct omap_mmc_platform_data *data)
{
struct platform_device *pdev;
struct resource res[OMAP_MMC_NR_RES];
int ret;
- pdev = platform_device_alloc("mmci-omap", id);
+ pdev = platform_device_alloc(name, id);
if (!pdev)
return -ENOMEM;
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index e77373c..47ec77a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -709,6 +709,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
chan->dev_name = dev_name;
chan->callback = callback;
chan->data = data;
+ chan->flags = 0;
#ifndef CONFIG_ARCH_OMAP1
if (cpu_class_is_omap2()) {
@@ -1888,11 +1889,11 @@ static int omap2_dma_handle_ch(int ch)
status = dma_read(CSR(ch));
}
+ dma_write(status, CSR(ch));
+
if (likely(dma_chan[ch].callback != NULL))
dma_chan[ch].callback(ch, status, dma_chan[ch].data);
- dma_write(status, CSR(ch));
-
return 0;
}
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index b2062f1..a8e1178 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -339,6 +339,7 @@ IS_OMAP_TYPE(3430, 0x3430)
#define OMAP3430_REV_ES2_0 0x34301034
#define OMAP3430_REV_ES2_1 0x34302034
#define OMAP3430_REV_ES3_0 0x34303034
+#define OMAP3430_REV_ES3_1 0x34304034
/*
* omap_chip bits
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index eef873d..113c246 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -344,7 +344,8 @@ struct omap_mcbsp_platform_data {
u8 dma_rx_sync, dma_tx_sync;
u16 rx_irq, tx_irq;
struct omap_mcbsp_ops *ops;
- char const *clk_name;
+ char const **clk_names;
+ int num_clks;
};
struct omap_mcbsp {
@@ -376,7 +377,8 @@ struct omap_mcbsp {
/* Protect the field .free, while checking if the mcbsp is in use */
spinlock_t lock;
struct omap_mcbsp_platform_data *pdata;
- struct clk *clk;
+ struct clk **clks;
+ int num_clks;
};
extern struct omap_mcbsp **mcbsp_ptr;
extern int omap_mcbsp_count;
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index 031250f..73a9e15 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -115,8 +115,9 @@ void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
int nr_controllers);
void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
int nr_controllers);
-int omap_mmc_add(int id, unsigned long base, unsigned long size,
- unsigned int irq, struct omap_mmc_platform_data *data);
+int omap_mmc_add(const char *name, int id, unsigned long base,
+ unsigned long size, unsigned int irq,
+ struct omap_mmc_platform_data *data);
#else
static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
int nr_controllers)
@@ -126,8 +127,9 @@ static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
int nr_controllers)
{
}
-static inline int omap_mmc_add(int id, unsigned long base, unsigned long size,
- unsigned int irq, struct omap_mmc_platform_data *data)
+static inline int omap_mmc_add(const char *name, int id, unsigned long base,
+ unsigned long size, unsigned int irq,
+ struct omap_mmc_platform_data *data)
{
return 0;
}
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index f2401a8..e5842e3 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -214,6 +214,7 @@ EXPORT_SYMBOL(omap_mcbsp_set_io_type);
int omap_mcbsp_request(unsigned int id)
{
struct omap_mcbsp *mcbsp;
+ int i;
int err;
if (!omap_mcbsp_check_valid_id(id)) {
@@ -225,7 +226,8 @@ int omap_mcbsp_request(unsigned int id)
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
mcbsp->pdata->ops->request(id);
- clk_enable(mcbsp->clk);
+ for (i = 0; i < mcbsp->num_clks; i++)
+ clk_enable(mcbsp->clks[i]);
spin_lock(&mcbsp->lock);
if (!mcbsp->free) {
@@ -276,6 +278,7 @@ EXPORT_SYMBOL(omap_mcbsp_request);
void omap_mcbsp_free(unsigned int id)
{
struct omap_mcbsp *mcbsp;
+ int i;
if (!omap_mcbsp_check_valid_id(id)) {
printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
@@ -286,7 +289,8 @@ void omap_mcbsp_free(unsigned int id)
if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
mcbsp->pdata->ops->free(id);
- clk_disable(mcbsp->clk);
+ for (i = mcbsp->num_clks - 1; i >= 0; i--)
+ clk_disable(mcbsp->clks[i]);
spin_lock(&mcbsp->lock);
if (mcbsp->free) {
@@ -872,6 +876,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
struct omap_mcbsp *mcbsp;
int id = pdev->id - 1;
+ int i;
int ret = 0;
if (!pdata) {
@@ -916,14 +921,25 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
mcbsp->dma_rx_sync = pdata->dma_rx_sync;
mcbsp->dma_tx_sync = pdata->dma_tx_sync;
- if (pdata->clk_name)
- mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
- if (IS_ERR(mcbsp->clk)) {
- dev_err(&pdev->dev,
- "Invalid clock configuration for McBSP%d.\n",
- mcbsp->id);
- ret = PTR_ERR(mcbsp->clk);
- goto err_clk;
+ if (pdata->num_clks) {
+ mcbsp->num_clks = pdata->num_clks;
+ mcbsp->clks = kzalloc(mcbsp->num_clks * sizeof(struct clk *),
+ GFP_KERNEL);
+ if (!mcbsp->clks) {
+ ret = -ENOMEM;
+ goto exit;
+ }
+ for (i = 0; i < mcbsp->num_clks; i++) {
+ mcbsp->clks[i] = clk_get(&pdev->dev, pdata->clk_names[i]);
+ if (IS_ERR(mcbsp->clks[i])) {
+ dev_err(&pdev->dev,
+ "Invalid %s configuration for McBSP%d.\n",
+ pdata->clk_names[i], mcbsp->id);
+ ret = PTR_ERR(mcbsp->clks[i]);
+ goto err_clk;
+ }
+ }
+
}
mcbsp->pdata = pdata;
@@ -932,6 +948,9 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
return 0;
err_clk:
+ while (i--)
+ clk_put(mcbsp->clks[i]);
+ kfree(mcbsp->clks);
iounmap(mcbsp->io_base);
err_ioremap:
mcbsp->free = 0;
@@ -942,6 +961,7 @@ exit:
static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
{
struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
+ int i;
platform_set_drvdata(pdev, NULL);
if (mcbsp) {
@@ -950,12 +970,18 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
mcbsp->pdata->ops->free)
mcbsp->pdata->ops->free(mcbsp->id);
- clk_disable(mcbsp->clk);
- clk_put(mcbsp->clk);
+ for (i = mcbsp->num_clks - 1; i >= 0; i--) {
+ clk_disable(mcbsp->clks[i]);
+ clk_put(mcbsp->clks[i]);
+ }
iounmap(mcbsp->io_base);
- mcbsp->clk = NULL;
+ if (mcbsp->num_clks) {
+ kfree(mcbsp->clks);
+ mcbsp->clks = NULL;
+ mcbsp->num_clks = 0;
+ }
mcbsp->free = 0;
mcbsp->dev = NULL;
}
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index a949c4f..8f1f97d 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -169,26 +169,51 @@ config BF542
help
BF542 Processor Support.
+config BF542M
+ bool "BF542m"
+ help
+ BF542 Processor Support.
+
config BF544
bool "BF544"
help
BF544 Processor Support.
+config BF544M
+ bool "BF544m"
+ help
+ BF544 Processor Support.
+
config BF547
bool "BF547"
help
BF547 Processor Support.
+config BF547M
+ bool "BF547m"
+ help
+ BF547 Processor Support.
+
config BF548
bool "BF548"
help
BF548 Processor Support.
+config BF548M
+ bool "BF548m"
+ help
+ BF548 Processor Support.
+
config BF549
bool "BF549"
help
BF549 Processor Support.
+config BF549M
+ bool "BF549m"
+ help
+ BF549 Processor Support.
+
config BF561
bool "BF561"
help
@@ -224,39 +249,39 @@ config TICK_SOURCE_SYSTMR0
config BF_REV_MIN
int
- default 0 if (BF51x || BF52x || BF54x)
+ default 0 if (BF51x || BF52x || (BF54x && !BF54xM))
default 2 if (BF537 || BF536 || BF534)
- default 3 if (BF561 ||BF533 || BF532 || BF531)
+ default 3 if (BF561 || BF533 || BF532 || BF531 || BF54xM)
default 4 if (BF538 || BF539)
config BF_REV_MAX
int
- default 2 if (BF51x || BF52x || BF54x)
- default 3 if (BF537 || BF536 || BF534)
+ default 2 if (BF51x || BF52x || (BF54x && !BF54xM))
+ default 3 if (BF537 || BF536 || BF534 || BF54xM)
default 5 if (BF561 || BF538 || BF539)
default 6 if (BF533 || BF532 || BF531)
choice
prompt "Silicon Rev"
- default BF_REV_0_1 if (BF51x || BF52x || BF54x)
+ default BF_REV_0_1 if (BF51x || BF52x || (BF54x && !BF54xM))
default BF_REV_0_2 if (BF534 || BF536 || BF537)
- default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF561)
+ default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF54xM || BF561)
config BF_REV_0_0
bool "0.0"
- depends on (BF51x || BF52x || BF54x)
+ depends on (BF51x || BF52x || (BF54x && !BF54xM))
config BF_REV_0_1
bool "0.1"
- depends on (BF52x || BF54x)
+ depends on (BF52x || (BF54x && !BF54xM))
config BF_REV_0_2
bool "0.2"
- depends on (BF52x || BF537 || BF536 || BF534 || BF54x)
+ depends on (BF52x || BF537 || BF536 || BF534 || (BF54x && !BF54xM))
config BF_REV_0_3
bool "0.3"
- depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
+ depends on (BF54xM || BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
config BF_REV_0_4
bool "0.4"
@@ -293,9 +318,14 @@ config BF53x
depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
default y
+config BF54xM
+ bool
+ depends on (BF542M || BF544M || BF547M || BF548M || BF549M)
+ default y
+
config BF54x
bool
- depends on (BF542 || BF544 || BF547 || BF548 || BF549)
+ depends on (BF542 || BF544 || BF547 || BF548 || BF549 || BF54xM)
default y
config MEM_GENERIC_BOARD
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile
index e550c8d..d54c828 100644
--- a/arch/blackfin/Makefile
+++ b/arch/blackfin/Makefile
@@ -21,57 +21,67 @@ KALLSYMS += --symbol-prefix=_
KBUILD_DEFCONFIG := BF537-STAMP_defconfig
# setup the machine name and the machine dependent settings
-machine-$(CONFIG_BF512) := bf518
-machine-$(CONFIG_BF514) := bf518
-machine-$(CONFIG_BF516) := bf518
-machine-$(CONFIG_BF518) := bf518
-machine-$(CONFIG_BF522) := bf527
-machine-$(CONFIG_BF523) := bf527
-machine-$(CONFIG_BF524) := bf527
-machine-$(CONFIG_BF525) := bf527
-machine-$(CONFIG_BF526) := bf527
-machine-$(CONFIG_BF527) := bf527
-machine-$(CONFIG_BF531) := bf533
-machine-$(CONFIG_BF532) := bf533
-machine-$(CONFIG_BF533) := bf533
-machine-$(CONFIG_BF534) := bf537
-machine-$(CONFIG_BF536) := bf537
-machine-$(CONFIG_BF537) := bf537
-machine-$(CONFIG_BF538) := bf538
-machine-$(CONFIG_BF539) := bf538
-machine-$(CONFIG_BF542) := bf548
-machine-$(CONFIG_BF544) := bf548
-machine-$(CONFIG_BF547) := bf548
-machine-$(CONFIG_BF548) := bf548
-machine-$(CONFIG_BF549) := bf548
-machine-$(CONFIG_BF561) := bf561
+machine-$(CONFIG_BF512) := bf518
+machine-$(CONFIG_BF514) := bf518
+machine-$(CONFIG_BF516) := bf518
+machine-$(CONFIG_BF518) := bf518
+machine-$(CONFIG_BF522) := bf527
+machine-$(CONFIG_BF523) := bf527
+machine-$(CONFIG_BF524) := bf527
+machine-$(CONFIG_BF525) := bf527
+machine-$(CONFIG_BF526) := bf527
+machine-$(CONFIG_BF527) := bf527
+machine-$(CONFIG_BF531) := bf533
+machine-$(CONFIG_BF532) := bf533
+machine-$(CONFIG_BF533) := bf533
+machine-$(CONFIG_BF534) := bf537
+machine-$(CONFIG_BF536) := bf537
+machine-$(CONFIG_BF537) := bf537
+machine-$(CONFIG_BF538) := bf538
+machine-$(CONFIG_BF539) := bf538
+machine-$(CONFIG_BF542) := bf548
+machine-$(CONFIG_BF542M) := bf548
+machine-$(CONFIG_BF544) := bf548
+machine-$(CONFIG_BF544M) := bf548
+machine-$(CONFIG_BF547) := bf548
+machine-$(CONFIG_BF547M) := bf548
+machine-$(CONFIG_BF548) := bf548
+machine-$(CONFIG_BF548M) := bf548
+machine-$(CONFIG_BF549) := bf548
+machine-$(CONFIG_BF549M) := bf548
+machine-$(CONFIG_BF561) := bf561
MACHINE := $(machine-y)
export MACHINE
-cpu-$(CONFIG_BF512) := bf512
-cpu-$(CONFIG_BF514) := bf514
-cpu-$(CONFIG_BF516) := bf516
-cpu-$(CONFIG_BF518) := bf518
-cpu-$(CONFIG_BF522) := bf522
-cpu-$(CONFIG_BF523) := bf523
-cpu-$(CONFIG_BF524) := bf524
-cpu-$(CONFIG_BF525) := bf525
-cpu-$(CONFIG_BF526) := bf526
-cpu-$(CONFIG_BF527) := bf527
-cpu-$(CONFIG_BF531) := bf531
-cpu-$(CONFIG_BF532) := bf532
-cpu-$(CONFIG_BF533) := bf533
-cpu-$(CONFIG_BF534) := bf534
-cpu-$(CONFIG_BF536) := bf536
-cpu-$(CONFIG_BF537) := bf537
-cpu-$(CONFIG_BF538) := bf538
-cpu-$(CONFIG_BF539) := bf539
-cpu-$(CONFIG_BF542) := bf542
-cpu-$(CONFIG_BF544) := bf544
-cpu-$(CONFIG_BF547) := bf547
-cpu-$(CONFIG_BF548) := bf548
-cpu-$(CONFIG_BF549) := bf549
-cpu-$(CONFIG_BF561) := bf561
+cpu-$(CONFIG_BF512) := bf512
+cpu-$(CONFIG_BF514) := bf514
+cpu-$(CONFIG_BF516) := bf516
+cpu-$(CONFIG_BF518) := bf518
+cpu-$(CONFIG_BF522) := bf522
+cpu-$(CONFIG_BF523) := bf523
+cpu-$(CONFIG_BF524) := bf524
+cpu-$(CONFIG_BF525) := bf525
+cpu-$(CONFIG_BF526) := bf526
+cpu-$(CONFIG_BF527) := bf527
+cpu-$(CONFIG_BF531) := bf531
+cpu-$(CONFIG_BF532) := bf532
+cpu-$(CONFIG_BF533) := bf533
+cpu-$(CONFIG_BF534) := bf534
+cpu-$(CONFIG_BF536) := bf536
+cpu-$(CONFIG_BF537) := bf537
+cpu-$(CONFIG_BF538) := bf538
+cpu-$(CONFIG_BF539) := bf539
+cpu-$(CONFIG_BF542) := bf542
+cpu-$(CONFIG_BF542M) := bf542m
+cpu-$(CONFIG_BF544) := bf544
+cpu-$(CONFIG_BF544M) := bf544m
+cpu-$(CONFIG_BF547) := bf547
+cpu-$(CONFIG_BF547M) := bf547m
+cpu-$(CONFIG_BF548) := bf548
+cpu-$(CONFIG_BF548M) := bf548m
+cpu-$(CONFIG_BF549) := bf549
+cpu-$(CONFIG_BF549M) := bf549m
+cpu-$(CONFIG_BF561) := bf561
rev-$(CONFIG_BF_REV_0_0) := 0.0
rev-$(CONFIG_BF_REV_0_1) := 0.1
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index defb978..4fdb9e0 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -1,6 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.28-rc2
+# Fri Jan 9 17:58:41 2009
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
@@ -149,6 +150,7 @@ CONFIG_BF_REV_0_0=y
# CONFIG_BF_REV_ANY is not set
# CONFIG_BF_REV_NONE is not set
CONFIG_BF51x=y
+CONFIG_MEM_MT48LC32M8A2_75=y
CONFIG_BFIN518F_EZBRD=y
#
@@ -598,7 +600,10 @@ CONFIG_PHYLIB=y
# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
-# CONFIG_BFIN_MAC is not set
+CONFIG_BFIN_MAC=y
+CONFIG_BFIN_TX_DESC_NUM=10
+CONFIG_BFIN_RX_DESC_NUM=20
+# CONFIG_BFIN_MAC_RMII is not set
# CONFIG_SMC91X is not set
# CONFIG_SMSC911X is not set
# CONFIG_DM9000 is not set
@@ -679,7 +684,7 @@ CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_DEVKMEM is not set
-# CONFIG_BFIN_JTAG_COMM is not set
+CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
index 992424f..8e2b855 100644
--- a/arch/blackfin/configs/BF526-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -723,7 +723,7 @@ CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_DEVKMEM is not set
-# CONFIG_BFIN_JTAG_COMM is not set
+CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 21e3c1a..833128b 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -767,7 +767,7 @@ CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_DEVKMEM is not set
-# CONFIG_BFIN_JTAG_COMM is not set
+CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 0bdf20a..334c94b 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -672,7 +672,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
-# CONFIG_BFIN_JTAG_COMM is not set
+CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index 2f747d6..9d73343 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -679,7 +679,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
-# CONFIG_BFIN_JTAG_COMM is not set
+CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 8b0a812..4fb4108 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -722,7 +722,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
-# CONFIG_BFIN_JTAG_COMM is not set
+CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig
index a1f766b..cb32f56 100644
--- a/arch/blackfin/configs/BF538-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF538-EZKIT_defconfig
@@ -726,7 +726,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
-# CONFIG_BFIN_JTAG_COMM is not set
+CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index cd2da6b..0f869761 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -856,7 +856,7 @@ CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_DEVKMEM is not set
-# CONFIG_BFIN_JTAG_COMM is not set
+CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index b398ca2..042c7ad 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -709,7 +709,7 @@ CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
-# CONFIG_BFIN_JTAG_COMM is not set
+CONFIG_BFIN_JTAG_COMM=m
# CONFIG_SERIAL_NONSTANDARD is not set
#
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig
index 9514694..865ed85 100644
--- a/arch/blackfin/configs/CM-BF527_defconfig
+++ b/arch/blackfin/configs/CM-BF527_defconfig
@@ -1,7 +1,6 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24.7
-# Fri Jul 18 18:00:41 2008
+# Linux kernel version: 2.6.28
#
# CONFIG_MMU is not set
# CONFIG_FPU is not set
@@ -9,7 +8,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BLACKFIN=y
CONFIG_ZONE_DMA=y
-CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
@@ -32,18 +30,16 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
-CONFIG_FAIR_GROUP_SCHED=y
-CONFIG_FAIR_USER_SCHED=y
-# CONFIG_FAIR_CGROUP_SCHED is not set
-# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -52,26 +48,35 @@ CONFIG_EMBEDDED=y
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
# CONFIG_ELF_CORE is not set
+CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
+CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_TINY_SHMEM=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
@@ -82,6 +87,7 @@ CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
@@ -95,9 +101,11 @@ CONFIG_IOSCHED_CFQ=y
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_PREEMPT is not set
+# CONFIG_FREEZER is not set
#
# Blackfin Processor Options
@@ -106,6 +114,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
#
# Processor and Board Settings
#
+# CONFIG_BF512 is not set
+# CONFIG_BF514 is not set
+# CONFIG_BF516 is not set
+# CONFIG_BF518 is not set
# CONFIG_BF522 is not set
# CONFIG_BF523 is not set
# CONFIG_BF524 is not set
@@ -118,48 +130,32 @@ CONFIG_BF527=y
# CONFIG_BF534 is not set
# CONFIG_BF536 is not set
# CONFIG_BF537 is not set
+# CONFIG_BF538 is not set
+# CONFIG_BF539 is not set
# CONFIG_BF542 is not set
+# CONFIG_BF542M is not set
# CONFIG_BF544 is not set
+# CONFIG_BF544M is not set
# CONFIG_BF547 is not set
+# CONFIG_BF547M is not set
# CONFIG_BF548 is not set
+# CONFIG_BF548M is not set
# CONFIG_BF549 is not set
+# CONFIG_BF549M is not set
# CONFIG_BF561 is not set
+CONFIG_BF_REV_MIN=0
+CONFIG_BF_REV_MAX=2
# CONFIG_BF_REV_0_0 is not set
CONFIG_BF_REV_0_1=y
# CONFIG_BF_REV_0_2 is not set
# CONFIG_BF_REV_0_3 is not set
# CONFIG_BF_REV_0_4 is not set
# CONFIG_BF_REV_0_5 is not set
+# CONFIG_BF_REV_0_6 is not set
# CONFIG_BF_REV_ANY is not set
# CONFIG_BF_REV_NONE is not set
CONFIG_BF52x=y
CONFIG_MEM_MT48LC16M16A2TG_75=y
-# CONFIG_BFIN527_EZKIT is not set
-CONFIG_BFIN527_BLUETECHNIX_CM=y
-
-#
-# BF527 Specific Configuration
-#
-
-#
-# Alternative Multiplexing Scheme
-#
-# CONFIG_BF527_SPORT0_PORTF is not set
-CONFIG_BF527_SPORT0_PORTG=y
-CONFIG_BF527_SPORT0_TSCLK_PG10=y
-# CONFIG_BF527_SPORT0_TSCLK_PG14 is not set
-CONFIG_BF527_UART1_PORTF=y
-# CONFIG_BF527_UART1_PORTG is not set
-# CONFIG_BF527_NAND_D_PORTF is not set
-CONFIG_BF527_NAND_D_PORTH=y
-
-#
-# Interrupt Priority Assignment
-#
-
-#
-# Priority
-#
CONFIG_IRQ_PLL_WAKEUP=7
CONFIG_IRQ_DMA0_ERROR=7
CONFIG_IRQ_DMAR0_BLK=7
@@ -179,7 +175,6 @@ CONFIG_IRQ_SPORT0_TX=9
CONFIG_IRQ_SPORT1_RX=9
CONFIG_IRQ_SPORT1_TX=9
CONFIG_IRQ_TWI=10
-CONFIG_IRQ_SPI=10
CONFIG_IRQ_UART0_RX=10
CONFIG_IRQ_UART0_TX=10
CONFIG_IRQ_UART1_RX=10
@@ -205,6 +200,34 @@ CONFIG_IRQ_MEM_DMA1=13
CONFIG_IRQ_WATCH=13
CONFIG_IRQ_PORTF_INTA=13
CONFIG_IRQ_PORTF_INTB=13
+# CONFIG_BFIN527_EZKIT is not set
+CONFIG_BFIN527_BLUETECHNIX_CM=y
+# CONFIG_BFIN526_EZBRD is not set
+
+#
+# BF527 Specific Configuration
+#
+
+#
+# Alternative Multiplexing Scheme
+#
+# CONFIG_BF527_SPORT0_PORTF is not set
+CONFIG_BF527_SPORT0_PORTG=y
+CONFIG_BF527_SPORT0_TSCLK_PG10=y
+# CONFIG_BF527_SPORT0_TSCLK_PG14 is not set
+CONFIG_BF527_UART1_PORTF=y
+# CONFIG_BF527_UART1_PORTG is not set
+# CONFIG_BF527_NAND_D_PORTF is not set
+CONFIG_BF527_NAND_D_PORTH=y
+
+#
+# Interrupt Priority Assignment
+#
+
+#
+# Priority
+#
+CONFIG_IRQ_SPI=10
CONFIG_IRQ_SPI_ERROR=7
CONFIG_IRQ_NFC_ERROR=7
CONFIG_IRQ_HDMA_ERROR=7
@@ -226,7 +249,6 @@ CONFIG_BOOT_LOAD=0x1000
#
CONFIG_CLKIN_HZ=25000000
# CONFIG_BFIN_KERNEL_CLOCK is not set
-CONFIG_MAX_MEM_SIZE=512
CONFIG_MAX_VCO_HZ=600000000
CONFIG_MIN_VCO_HZ=50000000
CONFIG_MAX_SCLK_HZ=133333333
@@ -240,10 +262,10 @@ CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
# CONFIG_CYCLES_CLOCKSOURCE is not set
-# CONFIG_TICK_ONESHOT is not set
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -277,6 +299,12 @@ CONFIG_ACCESS_OK_L1=y
CONFIG_CACHELINE_ALIGNED_L1=y
# CONFIG_SYSCALL_TAB_L1 is not set
# CONFIG_CPLB_SWITCH_TAB_L1 is not set
+CONFIG_APP_STACK_L1=y
+
+#
+# Speed Optimizations
+#
+CONFIG_BFIN_INS_LOWOVERHEAD=y
CONFIG_RAMKERNEL=y
# CONFIG_ROMKERNEL is not set
CONFIG_SELECT_MEMORY_MODEL=y
@@ -285,10 +313,10 @@ CONFIG_FLATMEM_MANUAL=y
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y
CONFIG_BFIN_GPTIMERS=y
@@ -334,7 +362,6 @@ CONFIG_BANK_3=0xFFC0
#
# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
#
-# CONFIG_PCI is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set
@@ -345,25 +372,20 @@ CONFIG_BINFMT_ELF_FDPIC=y
CONFIG_BINFMT_FLAT=y
CONFIG_BINFMT_ZFLAT=y
# CONFIG_BINFMT_SHARED_FLAT is not set
+# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
#
# Power management options
#
# CONFIG_PM is not set
-CONFIG_SUSPEND_UP_POSSIBLE=y
-# CONFIG_PM_BFIN_SLEEP_DEEPER is not set
-# CONFIG_PM_BFIN_SLEEP is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_PM_WAKEUP_BY_GPIO is not set
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
-
-#
-# Networking
-#
CONFIG_NET=y
#
@@ -376,6 +398,7 @@ CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
@@ -405,8 +428,6 @@ CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
@@ -415,6 +436,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
@@ -431,14 +453,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
@@ -456,6 +478,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
@@ -464,6 +488,7 @@ CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
@@ -507,6 +532,7 @@ CONFIG_MTD_ROM=m
#
CONFIG_MTD_COMPLEX_MAPPINGS=y
# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_GPIO_ADDR is not set
# CONFIG_MTD_UCLINUX is not set
# CONFIG_MTD_PLATRAM is not set
@@ -542,10 +568,12 @@ CONFIG_BLK_DEV=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
@@ -558,7 +586,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
@@ -579,6 +606,7 @@ CONFIG_PHYLIB=y
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
# CONFIG_FIXED_PHY is not set
# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
@@ -591,11 +619,14 @@ CONFIG_BFIN_MAC_RMII=y
# CONFIG_SMC91X is not set
# CONFIG_SMSC911X is not set
# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
-# CONFIG_B44 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
@@ -604,6 +635,7 @@ CONFIG_BFIN_MAC_RMII=y
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
#
# USB Network Adapters
@@ -616,7 +648,6 @@ CONFIG_BFIN_MAC_RMII=y
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
@@ -642,14 +673,15 @@ CONFIG_BFIN_MAC_RMII=y
# CONFIG_BF5xx_PPIFCD is not set
# CONFIG_BFIN_SIMPLE_TIMER is not set
# CONFIG_BF5xx_PPI is not set
-CONFIG_BFIN_OTP=y
-# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
+# CONFIG_BF5xx_EPPI is not set
# CONFIG_BFIN_SPORT is not set
# CONFIG_BFIN_TIMER_LATENCY is not set
# CONFIG_TWI_LCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
CONFIG_SIMPLE_GPIO=m
# CONFIG_VT is not set
# CONFIG_DEVKMEM is not set
+# CONFIG_BFIN_JTAG_COMM is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
@@ -673,6 +705,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_BFIN_SPORT is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
+CONFIG_BFIN_OTP=y
+# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
#
# CAN, the car bus and industrial fieldbus
@@ -680,44 +714,49 @@ CONFIG_UNIX98_PTYS=y
# CONFIG_CAN4LINUX is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
-# CONFIG_GEN_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_HELPER_AUTO=y
#
-# I2C Algorithms
+# I2C Hardware Bus support
#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
#
-# I2C Hardware Bus support
+# I2C system bus drivers (mostly embedded / system-on-chip)
#
CONFIG_I2C_BLACKFIN_TWI=m
CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set
-# CONFIG_I2C_STUB is not set
# CONFIG_I2C_TINY_USB is not set
#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
# Miscellaneous I2C Chip support
#
-# CONFIG_SENSORS_DS1337 is not set
-# CONFIG_SENSORS_DS1374 is not set
# CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
# CONFIG_SENSORS_AD5252 is not set
-# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCF8575 is not set
+# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_MAX6875 is not set
@@ -726,37 +765,41 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# SPI support
-#
CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_BFIN=y
+# CONFIG_SPI_BFIN_LOCK is not set
# CONFIG_SPI_BITBANG is not set
#
# SPI Protocol Masters
#
-# CONFIG_EEPROM_AT25 is not set
+# CONFIG_SPI_AT25 is not set
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_F71805F is not set
@@ -777,6 +820,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_MAX1111 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_MAX6650 is not set
# CONFIG_SENSORS_PC87360 is not set
@@ -785,6 +829,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
# CONFIG_SENSORS_THMC50 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_SENSORS_W83781D is not set
@@ -792,9 +837,12 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_W83792D is not set
# CONFIG_SENSORS_W83793 is not set
# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
@@ -810,21 +858,31 @@ CONFIG_BFIN_WDT=y
# CONFIG_USBPCWATCHDOG is not set
#
-# Sonics Silicon Backplane
-#
-CONFIG_SSB_POSSIBLE=y
-# CONFIG_SSB is not set
-
-#
# Multifunction device drivers
#
+# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_REGULATOR is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
# CONFIG_DAB is not set
#
@@ -839,10 +897,6 @@ CONFIG_SSB_POSSIBLE=y
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
-
-#
-# Sound
-#
# CONFIG_SOUND is not set
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
@@ -850,6 +904,7 @@ CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB_ARCH_HAS_EHCI is not set
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
#
# Miscellaneous USB options
@@ -860,40 +915,48 @@ CONFIG_USB_DEVICE_CLASS=y
# CONFIG_USB_OTG is not set
# CONFIG_USB_OTG_WHITELIST is not set
CONFIG_USB_OTG_BLACKLIST_HUB=y
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
#
# USB Host Controller Drivers
#
+# CONFIG_USB_C67X00_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
-# CONFIG_USB_ISP1362_HCD is not set
# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
CONFIG_USB_MUSB_HDRC=y
CONFIG_USB_MUSB_SOC=y
#
-# Blackfin high speed USB support
+# Blackfin high speed USB Support
#
CONFIG_USB_MUSB_HOST=y
# CONFIG_USB_MUSB_PERIPHERAL is not set
# CONFIG_USB_MUSB_OTG is not set
CONFIG_USB_MUSB_HDRC_HCD=y
CONFIG_MUSB_PIO_ONLY=y
-CONFIG_USB_MUSB_LOGLEVEL=0
+CONFIG_MUSB_DMA_POLL=y
+# CONFIG_USB_MUSB_DEBUG is not set
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
#
#
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
#
# CONFIG_USB_LIBUSUAL is not set
@@ -901,15 +964,10 @@ CONFIG_USB_MUSB_LOGLEVEL=0
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
-CONFIG_USB_MON=y
#
# USB port drivers
#
-
-#
-# USB Serial Converter support
-#
# CONFIG_USB_SERIAL is not set
#
@@ -918,7 +976,7 @@ CONFIG_USB_MON=y
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
-# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
@@ -934,17 +992,13 @@ CONFIG_USB_MON=y
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
-
-#
-# USB DSL modem support
-#
-
-#
-# USB Gadget Support
-#
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
# CONFIG_USB_GADGET is not set
# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
@@ -973,51 +1027,59 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
#
# SPI RTC drivers
#
-# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
#
# Platform RTC drivers
#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
CONFIG_RTC_DRV_BFIN=y
-
-#
-# Userspace I/O
-#
+# CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+# CONFIG_DNOTIFY is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
@@ -1059,8 +1121,11 @@ CONFIG_SYSFS=y
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
@@ -1068,13 +1133,12 @@ CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_LOCKD=m
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=m
-# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_SUNRPC_REGISTER_V4 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
@@ -1130,7 +1194,6 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
-# CONFIG_INSTRUMENTATION is not set
#
# Kernel hacking
@@ -1138,14 +1201,61 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
-# CONFIG_DEBUG_KERNEL is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_FRAME_POINTER is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+
+#
+# Tracers
+#
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_KGDB_TESTCASE is not set
+CONFIG_DEBUG_VERBOSE=y
CONFIG_DEBUG_MMRS=y
+# CONFIG_DEBUG_HWERR is not set
+# CONFIG_DEBUG_DOUBLEFAULT is not set
CONFIG_DEBUG_HUNT_FOR_ZERO=y
CONFIG_DEBUG_BFIN_HWTRACE_ON=y
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@@ -1154,7 +1264,7 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
# CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
-CONFIG_EARLY_PRINTK=y
+# CONFIG_EARLY_PRINTK is not set
# CONFIG_CPLB_INFO is not set
CONFIG_ACCESS_CHECK=y
@@ -1163,10 +1273,96 @@ CONFIG_ACCESS_CHECK=y
#
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_NETWORK is not set
-# CONFIG_SECURITY_CAPABILITIES is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
# CONFIG_SECURITY_ROOTPLUG is not set
-# CONFIG_CRYPTO is not set
+CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
#
# Library routines
@@ -1174,6 +1370,7 @@ CONFIG_SECURITY=y
CONFIG_BITREVERSE=y
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
diff --git a/arch/blackfin/include/asm/checksum.h b/arch/blackfin/include/asm/checksum.h
index f67289a..793581f 100644
--- a/arch/blackfin/include/asm/checksum.h
+++ b/arch/blackfin/include/asm/checksum.h
@@ -63,23 +63,23 @@ static inline __wsum
csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
unsigned short proto, __wsum sum)
{
-
- __asm__ ("%0 = %0 + %1;\n\t"
- "CC = AC0;\n\t"
- "if !CC jump 4;\n\t"
- "%0 = %0 + %4;\n\t"
- "%0 = %0 + %2;\n\t"
- "CC = AC0;\n\t"
- "if !CC jump 4;\n\t"
- "%0 = %0 + %4;\n\t"
- "%0 = %0 + %3;\n\t"
- "CC = AC0;\n\t"
- "if !CC jump 4;\n\t"
- "%0 = %0 + %4;\n\t"
- "NOP;\n\t"
- : "=d" (sum)
- : "d" (daddr), "d" (saddr), "d" ((ntohs(len)<<16)+proto*256), "d" (1), "0"(sum)
- : "CC");
+ unsigned int carry;
+
+ __asm__ ("%0 = %0 + %2;\n\t"
+ "CC = AC0;\n\t"
+ "%1 = CC;\n\t"
+ "%0 = %0 + %1;\n\t"
+ "%0 = %0 + %3;\n\t"
+ "CC = AC0;\n\t"
+ "%1 = CC;\n\t"
+ "%0 = %0 + %1;\n\t"
+ "%0 = %0 + %4;\n\t"
+ "CC = AC0;\n\t"
+ "%1 = CC;\n\t"
+ "%0 = %0 + %1;\n\t"
+ : "=d" (sum), "=&d" (carry)
+ : "d" (daddr), "d" (saddr), "d" ((len + proto) << 8), "0"(sum)
+ : "CC");
return (sum);
}
diff --git a/arch/blackfin/include/asm/delay.h b/arch/blackfin/include/asm/delay.h
index 0889c3a..c31f91c 100644
--- a/arch/blackfin/include/asm/delay.h
+++ b/arch/blackfin/include/asm/delay.h
@@ -13,29 +13,7 @@
static inline void __delay(unsigned long loops)
{
- if (ANOMALY_05000312) {
- /* Interrupted loads to loop registers -> bad */
- unsigned long tmp;
- __asm__ __volatile__(
- "[--SP] = LC0;"
- "[--SP] = LT0;"
- "[--SP] = LB0;"
- "LSETUP (1f,1f) LC0 = %1;"
- "1: NOP;"
- /* We take advantage of the fact that LC0 is 0 at
- * the end of the loop. Otherwise we'd need some
- * NOPs after the CLI here.
- */
- "CLI %0;"
- "LB0 = [SP++];"
- "LT0 = [SP++];"
- "LC0 = [SP++];"
- "STI %0;"
- : "=d" (tmp)
- : "a" (loops)
- );
- } else
- __asm__ __volatile__ (
+__asm__ __volatile__ (
"LSETUP(1f, 1f) LC0 = %0;"
"1: NOP;"
:
@@ -47,16 +25,15 @@ static inline void __delay(unsigned long loops)
#include <linux/param.h> /* needed for HZ */
/*
- * Use only for very small delays ( < 1 msec). Should probably use a
- * lookup table, really, as the multiplications take much too long with
- * short delays. This is a "reasonable" implementation, though (and the
- * first constant multiplications gets optimized away if the delay is
- * a constant)
+ * close approximation borrowed from m68knommu to avoid 64-bit math
*/
+
+#define HZSCALE (268435456 / (1000000/HZ))
+
static inline void udelay(unsigned long usecs)
{
extern unsigned long loops_per_jiffy;
- __delay(usecs * loops_per_jiffy / (1000000 / HZ));
+ __delay((((usecs * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6);
}
#endif
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 9477d82..d4a082ef 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -27,60 +27,6 @@
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
-* Number BF537/6/4 BF561 BF533/2/1
-* BF527/5/2
-*
-* GPIO_0 PF0 PF0 PF0
-* GPIO_1 PF1 PF1 PF1
-* GPIO_2 PF2 PF2 PF2
-* GPIO_3 PF3 PF3 PF3
-* GPIO_4 PF4 PF4 PF4
-* GPIO_5 PF5 PF5 PF5
-* GPIO_6 PF6 PF6 PF6
-* GPIO_7 PF7 PF7 PF7
-* GPIO_8 PF8 PF8 PF8
-* GPIO_9 PF9 PF9 PF9
-* GPIO_10 PF10 PF10 PF10
-* GPIO_11 PF11 PF11 PF11
-* GPIO_12 PF12 PF12 PF12
-* GPIO_13 PF13 PF13 PF13
-* GPIO_14 PF14 PF14 PF14
-* GPIO_15 PF15 PF15 PF15
-* GPIO_16 PG0 PF16
-* GPIO_17 PG1 PF17
-* GPIO_18 PG2 PF18
-* GPIO_19 PG3 PF19
-* GPIO_20 PG4 PF20
-* GPIO_21 PG5 PF21
-* GPIO_22 PG6 PF22
-* GPIO_23 PG7 PF23
-* GPIO_24 PG8 PF24
-* GPIO_25 PG9 PF25
-* GPIO_26 PG10 PF26
-* GPIO_27 PG11 PF27
-* GPIO_28 PG12 PF28
-* GPIO_29 PG13 PF29
-* GPIO_30 PG14 PF30
-* GPIO_31 PG15 PF31
-* GPIO_32 PH0 PF32
-* GPIO_33 PH1 PF33
-* GPIO_34 PH2 PF34
-* GPIO_35 PH3 PF35
-* GPIO_36 PH4 PF36
-* GPIO_37 PH5 PF37
-* GPIO_38 PH6 PF38
-* GPIO_39 PH7 PF39
-* GPIO_40 PH8 PF40
-* GPIO_41 PH9 PF41
-* GPIO_42 PH10 PF42
-* GPIO_43 PH11 PF43
-* GPIO_44 PH12 PF44
-* GPIO_45 PH13 PF45
-* GPIO_46 PH14 PF46
-* GPIO_47 PH15 PF47
-*/
-
#ifndef __ARCH_BLACKFIN_GPIO_H__
#define __ARCH_BLACKFIN_GPIO_H__
@@ -295,10 +241,6 @@ int bfin_gpio_direction_output(unsigned gpio, int value);
int bfin_gpio_get_value(unsigned gpio);
void bfin_gpio_set_value(unsigned gpio, int value);
-#ifndef BF548_FAMILY
-#define bfin_gpio_set_value(gpio, value) set_gpio_data(gpio, value)
-#endif
-
#ifdef CONFIG_GPIOLIB
#include <asm-generic/gpio.h> /* cansleep wrappers */
diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h
index 26ebac6..c8b256d 100644
--- a/arch/blackfin/include/asm/kgdb.h
+++ b/arch/blackfin/include/asm/kgdb.h
@@ -1,32 +1,8 @@
-/*
- * File: include/asm-blackfin/kgdb.h
- * Based on:
- * Author: Sonic Zhang
- *
- * Created:
- * Description:
- *
- * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
- *
- * Modified:
- * Copyright 2005-2006 Analog Devices Inc.
- *
- * Bugs: Enter bugs at http://blackfin.uclinux.org/
+/* Blackfin KGDB header
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * Copyright 2005-2009 Analog Devices Inc.
*
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * Licensed under the GPL-2 or later.
*/
#ifndef __ASM_BLACKFIN_KGDB_H__
@@ -37,17 +13,18 @@
/* gdb locks */
#define KGDB_MAX_NO_CPUS 8
-/************************************************************************/
-/* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/
-/* at least NUMREGBYTES*2 are needed for register packets */
-/* Longer buffer is needed to list all threads */
+/*
+ * BUFMAX defines the maximum number of characters in inbound/outbound buffers.
+ * At least NUMREGBYTES*2 are needed for register packets.
+ * Longer buffer is needed to list all threads.
+ */
#define BUFMAX 2048
/*
- * Note that this register image is different from
- * the register image that Linux produces at interrupt time.
- *
- * Linux's register image is defined by struct pt_regs in ptrace.h.
+ * Note that this register image is different from
+ * the register image that Linux produces at interrupt time.
+ *
+ * Linux's register image is defined by struct pt_regs in ptrace.h.
*/
enum regnames {
/* Core Registers */
@@ -104,14 +81,14 @@ enum regnames {
BFIN_RETX,
BFIN_RETN,
BFIN_RETE,
-
+
/* Pseudo Registers */
BFIN_PC,
BFIN_CC,
BFIN_EXTRA1, /* Address of .text section. */
BFIN_EXTRA2, /* Address of .data section. */
BFIN_EXTRA3, /* Address of .bss section. */
- BFIN_FDPIC_EXEC,
+ BFIN_FDPIC_EXEC,
BFIN_FDPIC_INTERP,
/* MMRs */
@@ -126,7 +103,7 @@ enum regnames {
static inline void arch_kgdb_breakpoint(void)
{
- asm(" EXCPT 2;");
+ asm("EXCPT 2;");
}
#define BREAK_INSTR_SIZE 2
#define CACHE_FLUSH_IS_SAFE 1
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h
index 255a931..61f7487 100644
--- a/arch/blackfin/include/asm/mem_init.h
+++ b/arch/blackfin/include/asm/mem_init.h
@@ -115,7 +115,7 @@
#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
/* Enable SCLK Out */
-#define mem_SDGCTL (0x80000000 | SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
+#define mem_SDGCTL (SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR | PSS)
#else
#define mem_SDRRC CONFIG_MEM_SDRRC
#define mem_SDGCTL CONFIG_MEM_SDGCTL
diff --git a/arch/blackfin/include/asm/pda.h b/arch/blackfin/include/asm/pda.h
index bd8d4a7..a671427 100644
--- a/arch/blackfin/include/asm/pda.h
+++ b/arch/blackfin/include/asm/pda.h
@@ -59,6 +59,7 @@ struct blackfin_pda { /* Per-processor Data Area */
unsigned long icplb_fault_addr;
unsigned long retx;
unsigned long seqstat;
+ unsigned int __nmi_count; /* number of times NMI asserted on this CPU */
};
extern struct blackfin_pda cpu_pda[];
diff --git a/arch/blackfin/include/asm/reboot.h b/arch/blackfin/include/asm/reboot.h
index 4856d62..ae1e363 100644
--- a/arch/blackfin/include/asm/reboot.h
+++ b/arch/blackfin/include/asm/reboot.h
@@ -15,6 +15,6 @@ extern void native_machine_halt(void);
extern void native_machine_power_off(void);
/* common reboot workarounds */
-extern void bfin_gpio_reset_spi0_ssel1(void);
+extern void bfin_reset_boot_spi_cs(unsigned short pin);
#endif
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index 38a2333..4a92a86 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -15,6 +15,8 @@ else
obj-y += time.o
endif
+CFLAGS_kgdb_test.o := -mlong-calls -O0
+
obj-$(CONFIG_IPIPE) += ipipe.o
obj-$(CONFIG_IPIPE_TRACE_MCOUNT) += mcount.o
obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 07e02c0..8531693 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -249,6 +249,13 @@ static void __dma_memcpy(u32 daddr, s16 dmod, u32 saddr, s16 smod, size_t cnt, u
spin_lock_irqsave(&mdma_lock, flags);
+ /* Force a sync in case a previous config reset on this channel
+ * occurred. This is needed so subsequent writes to DMA registers
+ * are not spuriously lost/corrupted. Do it under irq lock and
+ * without the anomaly version (because we are atomic already).
+ */
+ __builtin_bfin_ssync();
+
if (bfin_read_MDMA_S0_CONFIG())
while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
continue;
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 4c14331..51dac55 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -27,59 +27,6 @@
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
-* Number BF537/6/4 BF561 BF533/2/1 BF549/8/4/2
-*
-* GPIO_0 PF0 PF0 PF0 PA0...PJ13
-* GPIO_1 PF1 PF1 PF1
-* GPIO_2 PF2 PF2 PF2
-* GPIO_3 PF3 PF3 PF3
-* GPIO_4 PF4 PF4 PF4
-* GPIO_5 PF5 PF5 PF5
-* GPIO_6 PF6 PF6 PF6
-* GPIO_7 PF7 PF7 PF7
-* GPIO_8 PF8 PF8 PF8
-* GPIO_9 PF9 PF9 PF9
-* GPIO_10 PF10 PF10 PF10
-* GPIO_11 PF11 PF11 PF11
-* GPIO_12 PF12 PF12 PF12
-* GPIO_13 PF13 PF13 PF13
-* GPIO_14 PF14 PF14 PF14
-* GPIO_15 PF15 PF15 PF15
-* GPIO_16 PG0 PF16
-* GPIO_17 PG1 PF17
-* GPIO_18 PG2 PF18
-* GPIO_19 PG3 PF19
-* GPIO_20 PG4 PF20
-* GPIO_21 PG5 PF21
-* GPIO_22 PG6 PF22
-* GPIO_23 PG7 PF23
-* GPIO_24 PG8 PF24
-* GPIO_25 PG9 PF25
-* GPIO_26 PG10 PF26
-* GPIO_27 PG11 PF27
-* GPIO_28 PG12 PF28
-* GPIO_29 PG13 PF29
-* GPIO_30 PG14 PF30
-* GPIO_31 PG15 PF31
-* GPIO_32 PH0 PF32
-* GPIO_33 PH1 PF33
-* GPIO_34 PH2 PF34
-* GPIO_35 PH3 PF35
-* GPIO_36 PH4 PF36
-* GPIO_37 PH5 PF37
-* GPIO_38 PH6 PF38
-* GPIO_39 PH7 PF39
-* GPIO_40 PH8 PF40
-* GPIO_41 PH9 PF41
-* GPIO_42 PH10 PF42
-* GPIO_43 PH11 PF43
-* GPIO_44 PH12 PF44
-* GPIO_45 PH13 PF45
-* GPIO_46 PH14 PF46
-* GPIO_47 PH15 PF47
-*/
-
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/err.h>
@@ -119,62 +66,61 @@ enum {
#define AWA_DUMMY_READ(...) do { } while (0)
#endif
+static struct gpio_port_t * const gpio_array[] = {
#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
-static struct gpio_port_t *gpio_bankb[] = {
(struct gpio_port_t *) FIO_FLAG_D,
-};
-#endif
-
-#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
-static struct gpio_port_t *gpio_bankb[] = {
+#elif defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
(struct gpio_port_t *) PORTFIO,
(struct gpio_port_t *) PORTGIO,
(struct gpio_port_t *) PORTHIO,
+#elif defined(BF561_FAMILY)
+ (struct gpio_port_t *) FIO0_FLAG_D,
+ (struct gpio_port_t *) FIO1_FLAG_D,
+ (struct gpio_port_t *) FIO2_FLAG_D,
+#elif defined(BF548_FAMILY)
+ (struct gpio_port_t *)PORTA_FER,
+ (struct gpio_port_t *)PORTB_FER,
+ (struct gpio_port_t *)PORTC_FER,
+ (struct gpio_port_t *)PORTD_FER,
+ (struct gpio_port_t *)PORTE_FER,
+ (struct gpio_port_t *)PORTF_FER,
+ (struct gpio_port_t *)PORTG_FER,
+ (struct gpio_port_t *)PORTH_FER,
+ (struct gpio_port_t *)PORTI_FER,
+ (struct gpio_port_t *)PORTJ_FER,
+#else
+# error no gpio arrays defined
+#endif
};
-static unsigned short *port_fer[] = {
+#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
+static unsigned short * const port_fer[] = {
(unsigned short *) PORTF_FER,
(unsigned short *) PORTG_FER,
(unsigned short *) PORTH_FER,
};
-#endif
-#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
-static unsigned short *port_mux[] = {
+# if !defined(BF537_FAMILY)
+static unsigned short * const port_mux[] = {
(unsigned short *) PORTF_MUX,
(unsigned short *) PORTG_MUX,
(unsigned short *) PORTH_MUX,
};
static const
-u8 pmux_offset[][16] =
- {{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
- { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
- { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
- };
-#endif
-
-#ifdef BF561_FAMILY
-static struct gpio_port_t *gpio_bankb[] = {
- (struct gpio_port_t *) FIO0_FLAG_D,
- (struct gpio_port_t *) FIO1_FLAG_D,
- (struct gpio_port_t *) FIO2_FLAG_D,
+u8 pmux_offset[][16] = {
+# if defined(BF527_FAMILY)
+ { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
+ { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
+ { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
+# elif defined(BF518_FAMILY)
+ { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
+ { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
+ { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
+# endif
};
-#endif
+# endif
-#ifdef BF548_FAMILY
-static struct gpio_port_t *gpio_array[] = {
- (struct gpio_port_t *)PORTA_FER,
- (struct gpio_port_t *)PORTB_FER,
- (struct gpio_port_t *)PORTC_FER,
- (struct gpio_port_t *)PORTD_FER,
- (struct gpio_port_t *)PORTE_FER,
- (struct gpio_port_t *)PORTF_FER,
- (struct gpio_port_t *)PORTG_FER,
- (struct gpio_port_t *)PORTH_FER,
- (struct gpio_port_t *)PORTI_FER,
- (struct gpio_port_t *)PORTJ_FER,
-};
#endif
static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
@@ -188,35 +134,9 @@ static struct str_ident {
} str_ident[MAX_RESOURCES];
#if defined(CONFIG_PM)
-#if defined(CONFIG_BF54x)
-static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
-#else
-static unsigned short wakeup_map[GPIO_BANK_NUM];
-static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
-
-#ifdef BF533_FAMILY
-static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB};
-#endif
-
-#ifdef BF537_FAMILY
-static unsigned int sic_iwr_irqs[] = {IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX};
-#endif
-
-#ifdef BF538_FAMILY
-static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB};
#endif
-#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
-static unsigned int sic_iwr_irqs[] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB};
-#endif
-
-#ifdef BF561_FAMILY
-static unsigned int sic_iwr_irqs[] = {IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB};
-#endif
-#endif
-#endif /* CONFIG_PM */
-
inline int check_gpio(unsigned gpio)
{
#if defined(BF548_FAMILY)
@@ -330,9 +250,10 @@ static struct {
{.res = P_SPI0_SSEL3, .offset = 0},
};
-static void portmux_setup(unsigned short per, unsigned short function)
+static void portmux_setup(unsigned short per)
{
u16 y, offset, muxreg;
+ u16 function = P_FUNCT2MUX(per);
for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
if (port_mux_lut[y].res == per) {
@@ -353,30 +274,33 @@ static void portmux_setup(unsigned short per, unsigned short function)
}
}
#elif defined(BF548_FAMILY)
-inline void portmux_setup(unsigned short portno, unsigned short function)
+inline void portmux_setup(unsigned short per)
{
u32 pmux;
+ u16 ident = P_IDENT(per);
+ u16 function = P_FUNCT2MUX(per);
- pmux = gpio_array[gpio_bank(portno)]->port_mux;
+ pmux = gpio_array[gpio_bank(ident)]->port_mux;
- pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
- pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
+ pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
+ pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
- gpio_array[gpio_bank(portno)]->port_mux = pmux;
+ gpio_array[gpio_bank(ident)]->port_mux = pmux;
}
-inline u16 get_portmux(unsigned short portno)
+inline u16 get_portmux(unsigned short per)
{
u32 pmux;
+ u16 ident = P_IDENT(per);
- pmux = gpio_array[gpio_bank(portno)]->port_mux;
+ pmux = gpio_array[gpio_bank(ident)]->port_mux;
- return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
+ return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
}
#elif defined(BF527_FAMILY) || defined(BF518_FAMILY)
-inline void portmux_setup(unsigned short portno, unsigned short function)
+inline void portmux_setup(unsigned short per)
{
- u16 pmux, ident = P_IDENT(portno);
+ u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
pmux = *port_mux[gpio_bank(ident)];
@@ -424,90 +348,71 @@ void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
unsigned long flags; \
local_irq_save_hw(flags); \
if (arg) \
- gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
+ gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
else \
- gpio_bankb[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
+ gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
AWA_DUMMY_READ(name); \
local_irq_restore_hw(flags); \
} \
EXPORT_SYMBOL(set_gpio_ ## name);
-SET_GPIO(dir)
-SET_GPIO(inen)
-SET_GPIO(polar)
-SET_GPIO(edge)
-SET_GPIO(both)
+SET_GPIO(dir) /* set_gpio_dir() */
+SET_GPIO(inen) /* set_gpio_inen() */
+SET_GPIO(polar) /* set_gpio_polar() */
+SET_GPIO(edge) /* set_gpio_edge() */
+SET_GPIO(both) /* set_gpio_both() */
-#if ANOMALY_05000311 || ANOMALY_05000323
#define SET_GPIO_SC(name) \
void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
{ \
unsigned long flags; \
- local_irq_save_hw(flags); \
- if (arg) \
- gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
- else \
- gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
- AWA_DUMMY_READ(name); \
- local_irq_restore_hw(flags); \
-} \
-EXPORT_SYMBOL(set_gpio_ ## name);
-#else
-#define SET_GPIO_SC(name) \
-void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
-{ \
+ if (ANOMALY_05000311 || ANOMALY_05000323) \
+ local_irq_save_hw(flags); \
if (arg) \
- gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
+ gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
else \
- gpio_bankb[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
+ gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
+ if (ANOMALY_05000311 || ANOMALY_05000323) { \
+ AWA_DUMMY_READ(name); \
+ local_irq_restore_hw(flags); \
+ } \
} \
EXPORT_SYMBOL(set_gpio_ ## name);
-#endif
SET_GPIO_SC(maska)
SET_GPIO_SC(maskb)
SET_GPIO_SC(data)
-#if ANOMALY_05000311 || ANOMALY_05000323
void set_gpio_toggle(unsigned gpio)
{
unsigned long flags;
- local_irq_save_hw(flags);
- gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
- AWA_DUMMY_READ(toggle);
- local_irq_restore_hw(flags);
-}
-#else
-void set_gpio_toggle(unsigned gpio)
-{
- gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
+ if (ANOMALY_05000311 || ANOMALY_05000323)
+ local_irq_save_hw(flags);
+ gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
+ if (ANOMALY_05000311 || ANOMALY_05000323) {
+ AWA_DUMMY_READ(toggle);
+ local_irq_restore_hw(flags);
+ }
}
-#endif
EXPORT_SYMBOL(set_gpio_toggle);
/*Set current PORT date (16-bit word)*/
-#if ANOMALY_05000311 || ANOMALY_05000323
#define SET_GPIO_P(name) \
void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
{ \
unsigned long flags; \
- local_irq_save_hw(flags); \
- gpio_bankb[gpio_bank(gpio)]->name = arg; \
- AWA_DUMMY_READ(name); \
- local_irq_restore_hw(flags); \
+ if (ANOMALY_05000311 || ANOMALY_05000323) \
+ local_irq_save_hw(flags); \
+ gpio_array[gpio_bank(gpio)]->name = arg; \
+ if (ANOMALY_05000311 || ANOMALY_05000323) { \
+ AWA_DUMMY_READ(name); \
+ local_irq_restore_hw(flags); \
+ } \
} \
EXPORT_SYMBOL(set_gpiop_ ## name);
-#else
-#define SET_GPIO_P(name) \
-void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
-{ \
- gpio_bankb[gpio_bank(gpio)]->name = arg; \
-} \
-EXPORT_SYMBOL(set_gpiop_ ## name);
-#endif
SET_GPIO_P(data)
SET_GPIO_P(dir)
@@ -519,27 +424,21 @@ SET_GPIO_P(maska)
SET_GPIO_P(maskb)
/* Get a specific bit */
-#if ANOMALY_05000311 || ANOMALY_05000323
#define GET_GPIO(name) \
unsigned short get_gpio_ ## name(unsigned gpio) \
{ \
unsigned long flags; \
unsigned short ret; \
- local_irq_save_hw(flags); \
- ret = 0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
- AWA_DUMMY_READ(name); \
- local_irq_restore_hw(flags); \
+ if (ANOMALY_05000311 || ANOMALY_05000323) \
+ local_irq_save_hw(flags); \
+ ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
+ if (ANOMALY_05000311 || ANOMALY_05000323) { \
+ AWA_DUMMY_READ(name); \
+ local_irq_restore_hw(flags); \
+ } \
return ret; \
} \
EXPORT_SYMBOL(get_gpio_ ## name);
-#else
-#define GET_GPIO(name) \
-unsigned short get_gpio_ ## name(unsigned gpio) \
-{ \
- return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
-} \
-EXPORT_SYMBOL(get_gpio_ ## name);
-#endif
GET_GPIO(data)
GET_GPIO(dir)
@@ -552,27 +451,21 @@ GET_GPIO(maskb)
/*Get current PORT date (16-bit word)*/
-#if ANOMALY_05000311 || ANOMALY_05000323
#define GET_GPIO_P(name) \
unsigned short get_gpiop_ ## name(unsigned gpio) \
{ \
unsigned long flags; \
unsigned short ret; \
- local_irq_save_hw(flags); \
- ret = (gpio_bankb[gpio_bank(gpio)]->name); \
- AWA_DUMMY_READ(name); \
- local_irq_restore_hw(flags); \
+ if (ANOMALY_05000311 || ANOMALY_05000323) \
+ local_irq_save_hw(flags); \
+ ret = (gpio_array[gpio_bank(gpio)]->name); \
+ if (ANOMALY_05000311 || ANOMALY_05000323) { \
+ AWA_DUMMY_READ(name); \
+ local_irq_restore_hw(flags); \
+ } \
return ret; \
} \
EXPORT_SYMBOL(get_gpiop_ ## name);
-#else
-#define GET_GPIO_P(name) \
-unsigned short get_gpiop_ ## name(unsigned gpio) \
-{ \
- return (gpio_bankb[gpio_bank(gpio)]->name);\
-} \
-EXPORT_SYMBOL(get_gpiop_ ## name);
-#endif
GET_GPIO_P(data)
GET_GPIO_P(dir)
@@ -585,6 +478,26 @@ GET_GPIO_P(maskb)
#ifdef CONFIG_PM
+
+static unsigned short wakeup_map[GPIO_BANK_NUM];
+static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
+
+static const unsigned int sic_iwr_irqs[] = {
+#if defined(BF533_FAMILY)
+ IRQ_PROG_INTB
+#elif defined(BF537_FAMILY)
+ IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
+#elif defined(BF538_FAMILY)
+ IRQ_PORTF_INTB
+#elif defined(BF527_FAMILY) || defined(BF518_FAMILY)
+ IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
+#elif defined(BF561_FAMILY)
+ IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
+#else
+# error no SIC_IWR defined
+#endif
+};
+
/***********************************************************
*
* FUNCTIONS: Blackfin PM Setup API
@@ -669,18 +582,18 @@ u32 bfin_pm_standby_setup(void)
mask = wakeup_map[gpio_bank(i)];
bank = gpio_bank(i);
- gpio_bank_saved[bank].maskb = gpio_bankb[bank]->maskb;
- gpio_bankb[bank]->maskb = 0;
+ gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb;
+ gpio_array[bank]->maskb = 0;
if (mask) {
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
gpio_bank_saved[bank].fer = *port_fer[bank];
#endif
- gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
- gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
- gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
- gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
- gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
+ gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
+ gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
+ gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
+ gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
+ gpio_bank_saved[bank].both = gpio_array[bank]->both;
gpio_bank_saved[bank].reserved =
reserved_gpio_map[bank];
@@ -700,7 +613,7 @@ u32 bfin_pm_standby_setup(void)
}
bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
- gpio_bankb[bank]->maskb_set = wakeup_map[gpio_bank(i)];
+ gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)];
}
}
@@ -721,18 +634,18 @@ void bfin_pm_standby_restore(void)
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
*port_fer[bank] = gpio_bank_saved[bank].fer;
#endif
- gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
- gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
- gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
- gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
- gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
+ gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
+ gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
+ gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
+ gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
+ gpio_array[bank]->both = gpio_bank_saved[bank].both;
reserved_gpio_map[bank] =
gpio_bank_saved[bank].reserved;
bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
}
- gpio_bankb[bank]->maskb = gpio_bank_saved[bank].maskb;
+ gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb;
}
AWA_DUMMY_READ(maskb);
}
@@ -745,21 +658,21 @@ void bfin_gpio_pm_hibernate_suspend(void)
bank = gpio_bank(i);
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
- gpio_bank_saved[bank].fer = *port_fer[bank];
+ gpio_bank_saved[bank].fer = *port_fer[bank];
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
- gpio_bank_saved[bank].mux = *port_mux[bank];
+ gpio_bank_saved[bank].mux = *port_mux[bank];
#else
- if (bank == 0)
- gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
+ if (bank == 0)
+ gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
#endif
#endif
- gpio_bank_saved[bank].data = gpio_bankb[bank]->data;
- gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen;
- gpio_bank_saved[bank].polar = gpio_bankb[bank]->polar;
- gpio_bank_saved[bank].dir = gpio_bankb[bank]->dir;
- gpio_bank_saved[bank].edge = gpio_bankb[bank]->edge;
- gpio_bank_saved[bank].both = gpio_bankb[bank]->both;
- gpio_bank_saved[bank].maska = gpio_bankb[bank]->maska;
+ gpio_bank_saved[bank].data = gpio_array[bank]->data;
+ gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
+ gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
+ gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
+ gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
+ gpio_bank_saved[bank].both = gpio_array[bank]->both;
+ gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
}
AWA_DUMMY_READ(maska);
@@ -770,27 +683,27 @@ void bfin_gpio_pm_hibernate_restore(void)
int i, bank;
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
- bank = gpio_bank(i);
+ bank = gpio_bank(i);
#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY)
#if defined(BF527_FAMILY) || defined(BF518_FAMILY)
- *port_mux[bank] = gpio_bank_saved[bank].mux;
+ *port_mux[bank] = gpio_bank_saved[bank].mux;
#else
- if (bank == 0)
- bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
+ if (bank == 0)
+ bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
#endif
- *port_fer[bank] = gpio_bank_saved[bank].fer;
+ *port_fer[bank] = gpio_bank_saved[bank].fer;
#endif
- gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen;
- gpio_bankb[bank]->dir = gpio_bank_saved[bank].dir;
- gpio_bankb[bank]->polar = gpio_bank_saved[bank].polar;
- gpio_bankb[bank]->edge = gpio_bank_saved[bank].edge;
- gpio_bankb[bank]->both = gpio_bank_saved[bank].both;
+ gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
+ gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
+ gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
+ gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
+ gpio_array[bank]->both = gpio_bank_saved[bank].both;
- gpio_bankb[bank]->data_set = gpio_bank_saved[bank].data
- | gpio_bank_saved[bank].dir;
+ gpio_array[bank]->data_set = gpio_bank_saved[bank].data
+ | gpio_bank_saved[bank].dir;
- gpio_bankb[bank]->maska = gpio_bank_saved[bank].maska;
+ gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
}
AWA_DUMMY_READ(maska);
}
@@ -817,12 +730,12 @@ void bfin_gpio_pm_hibernate_suspend(void)
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
bank = gpio_bank(i);
- gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
- gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
- gpio_bank_saved[bank].data = gpio_array[bank]->port_data;
- gpio_bank_saved[bank].data = gpio_array[bank]->port_data;
- gpio_bank_saved[bank].inen = gpio_array[bank]->port_inen;
- gpio_bank_saved[bank].dir = gpio_array[bank]->port_dir_set;
+ gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
+ gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
+ gpio_bank_saved[bank].data = gpio_array[bank]->data;
+ gpio_bank_saved[bank].data = gpio_array[bank]->data;
+ gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
+ gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
}
}
@@ -831,21 +744,21 @@ void bfin_gpio_pm_hibernate_restore(void)
int i, bank;
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
- bank = gpio_bank(i);
-
- gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
- gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
- gpio_array[bank]->port_inen = gpio_bank_saved[bank].inen;
- gpio_array[bank]->port_dir_set = gpio_bank_saved[bank].dir;
- gpio_array[bank]->port_set = gpio_bank_saved[bank].data
- | gpio_bank_saved[bank].dir;
+ bank = gpio_bank(i);
+
+ gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
+ gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
+ gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
+ gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
+ gpio_array[bank]->data_set = gpio_bank_saved[bank].data
+ | gpio_bank_saved[bank].dir;
}
}
#endif
unsigned short get_gpio_dir(unsigned gpio)
{
- return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio)));
+ return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
}
EXPORT_SYMBOL(get_gpio_dir);
@@ -905,9 +818,7 @@ int peripheral_request(unsigned short per, const char *label)
*/
#ifdef BF548_FAMILY
- u16 funct = get_portmux(ident);
-
- if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
+ if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
#else
if (!(per & P_MAYSHARE)) {
#endif
@@ -931,11 +842,7 @@ int peripheral_request(unsigned short per, const char *label)
anyway:
reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
-#ifdef BF548_FAMILY
- portmux_setup(ident, P_FUNCT2MUX(per));
-#else
- portmux_setup(per, P_FUNCT2MUX(per));
-#endif
+ portmux_setup(per);
port_setup(ident, PERIPHERAL_USAGE);
local_irq_restore_hw(flags);
@@ -977,9 +884,6 @@ void peripheral_free(unsigned short per)
if (!(per & P_DEFINED))
return;
- if (check_gpio(ident) < 0)
- return;
-
local_irq_save_hw(flags);
if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
@@ -1056,9 +960,15 @@ int bfin_gpio_request(unsigned gpio, const char *label)
local_irq_restore_hw(flags);
return -EBUSY;
}
- if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))
+ if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
" (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
+ }
+#ifndef BF548_FAMILY
+ else { /* Reset POLAR setting when acquiring a gpio for the first time */
+ set_gpio_polar(gpio, 0);
+ }
+#endif
reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
set_label(gpio, label);
@@ -1078,6 +988,8 @@ void bfin_gpio_free(unsigned gpio)
if (check_gpio(gpio) < 0)
return;
+ might_sleep();
+
local_irq_save_hw(flags);
if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
@@ -1158,8 +1070,16 @@ void bfin_gpio_irq_free(unsigned gpio)
local_irq_restore_hw(flags);
}
-
+static inline void __bfin_gpio_direction_input(unsigned gpio)
+{
#ifdef BF548_FAMILY
+ gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
+#else
+ gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
+#endif
+ gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
+}
+
int bfin_gpio_direction_input(unsigned gpio)
{
unsigned long flags;
@@ -1170,125 +1090,85 @@ int bfin_gpio_direction_input(unsigned gpio)
}
local_irq_save_hw(flags);
- gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
- gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
+ __bfin_gpio_direction_input(gpio);
+ AWA_DUMMY_READ(inen);
local_irq_restore_hw(flags);
return 0;
}
EXPORT_SYMBOL(bfin_gpio_direction_input);
-int bfin_gpio_direction_output(unsigned gpio, int value)
+void bfin_gpio_irq_prepare(unsigned gpio)
{
+#ifdef BF548_FAMILY
unsigned long flags;
+#endif
- if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
- gpio_error(gpio);
- return -EINVAL;
- }
+ port_setup(gpio, GPIO_USAGE);
+#ifdef BF548_FAMILY
local_irq_save_hw(flags);
- gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
- gpio_set_value(gpio, value);
- gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
+ __bfin_gpio_direction_input(gpio);
local_irq_restore_hw(flags);
-
- return 0;
+#endif
}
-EXPORT_SYMBOL(bfin_gpio_direction_output);
void bfin_gpio_set_value(unsigned gpio, int arg)
{
if (arg)
- gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
+ gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
else
- gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
+ gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
}
EXPORT_SYMBOL(bfin_gpio_set_value);
-int bfin_gpio_get_value(unsigned gpio)
-{
- return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
-}
-EXPORT_SYMBOL(bfin_gpio_get_value);
-
-void bfin_gpio_irq_prepare(unsigned gpio)
+int bfin_gpio_direction_output(unsigned gpio, int value)
{
unsigned long flags;
- port_setup(gpio, GPIO_USAGE);
+ if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
+ gpio_error(gpio);
+ return -EINVAL;
+ }
local_irq_save_hw(flags);
- gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
- gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
- local_irq_restore_hw(flags);
-}
+ gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
+ gpio_set_value(gpio, value);
+#ifdef BF548_FAMILY
+ gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
#else
+ gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
+#endif
+
+ AWA_DUMMY_READ(dir);
+ local_irq_restore_hw(flags);
+
+ return 0;
+}
+EXPORT_SYMBOL(bfin_gpio_direction_output);
int bfin_gpio_get_value(unsigned gpio)
{
+#ifdef BF548_FAMILY
+ return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
+#else
unsigned long flags;
- int ret;
if (unlikely(get_gpio_edge(gpio))) {
+ int ret;
local_irq_save_hw(flags);
set_gpio_edge(gpio, 0);
ret = get_gpio_data(gpio);
set_gpio_edge(gpio, 1);
local_irq_restore_hw(flags);
-
return ret;
} else
return get_gpio_data(gpio);
+#endif
}
EXPORT_SYMBOL(bfin_gpio_get_value);
-
-int bfin_gpio_direction_input(unsigned gpio)
-{
- unsigned long flags;
-
- if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
- gpio_error(gpio);
- return -EINVAL;
- }
-
- local_irq_save_hw(flags);
- gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
- gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
- AWA_DUMMY_READ(inen);
- local_irq_restore_hw(flags);
-
- return 0;
-}
-EXPORT_SYMBOL(bfin_gpio_direction_input);
-
-int bfin_gpio_direction_output(unsigned gpio, int value)
-{
- unsigned long flags;
-
- if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
- gpio_error(gpio);
- return -EINVAL;
- }
-
- local_irq_save_hw(flags);
- gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
-
- if (value)
- gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
- else
- gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
-
- gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
- AWA_DUMMY_READ(dir);
- local_irq_restore_hw(flags);
-
- return 0;
-}
-EXPORT_SYMBOL(bfin_gpio_direction_output);
-
/* If we are booting from SPI and our board lacks a strong enough pull up,
* the core can reset and execute the bootrom faster than the resistor can
* pull the signal logically high. To work around this (common) error in
@@ -1299,23 +1179,15 @@ EXPORT_SYMBOL(bfin_gpio_direction_output);
* lives here as we need to force all the GPIO states w/out going through
* BUG() checks and such.
*/
-void bfin_gpio_reset_spi0_ssel1(void)
+void bfin_reset_boot_spi_cs(unsigned short pin)
{
- u16 gpio = P_IDENT(P_SPI0_SSEL1);
-
+ unsigned short gpio = P_IDENT(pin);
port_setup(gpio, GPIO_USAGE);
- gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
+ gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
AWA_DUMMY_READ(data_set);
udelay(1);
}
-void bfin_gpio_irq_prepare(unsigned gpio)
-{
- port_setup(gpio, GPIO_USAGE);
-}
-
-#endif /*BF548_FAMILY */
-
#if defined(CONFIG_PROC_FS)
static int gpio_proc_read(char *buf, char **start, off_t offset,
int len, int *unused_i, void *unused_v)
@@ -1369,11 +1241,7 @@ int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
{
-#ifdef BF548_FAMILY
return bfin_gpio_set_value(gpio, value);
-#else
- return set_gpio_data(gpio, value);
-#endif
}
int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
index bdb9584..3e329a6 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -63,10 +63,8 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
dcplb_tbl[cpu][i_d].addr = 0;
dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
-#if 0
icplb_tbl[cpu][i_i].addr = 0;
- icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB;
-#endif
+ icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_1KB;
/* Cover kernel memory with 4M pages. */
addr = 0;
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbmgr.c b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c
index 376249a..8cbb47c 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c
@@ -163,12 +163,14 @@ MGR_ATTR static int icplb_miss(int cpu)
nr_icplb_supv_miss[cpu]++;
base = 0;
- for (idx = 0; idx < icplb_nr_bounds; idx++) {
+ idx = 0;
+ do {
eaddr = icplb_bounds[idx].eaddr;
if (addr < eaddr)
break;
base = eaddr;
- }
+ } while (++idx < icplb_nr_bounds);
+
if (unlikely(idx == icplb_nr_bounds))
return CPLB_NO_ADDR_MATCH;
@@ -208,12 +210,14 @@ MGR_ATTR static int dcplb_miss(int cpu)
nr_dcplb_supv_miss[cpu]++;
base = 0;
- for (idx = 0; idx < dcplb_nr_bounds; idx++) {
+ idx = 0;
+ do {
eaddr = dcplb_bounds[idx].eaddr;
if (addr < eaddr)
break;
base = eaddr;
- }
+ } while (++idx < dcplb_nr_bounds);
+
if (unlikely(idx == dcplb_nr_bounds))
return CPLB_NO_ADDR_MATCH;
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c
index ab8209c..75724ee 100644
--- a/arch/blackfin/kernel/irqchip.c
+++ b/arch/blackfin/kernel/irqchip.c
@@ -35,6 +35,7 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/trace.h>
+#include <asm/pda.h>
static atomic_t irq_err_count;
static spinlock_t irq_controller_lock;
@@ -91,8 +92,13 @@ int show_interrupts(struct seq_file *p, void *v)
seq_putc(p, '\n');
skip:
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
- } else if (i == NR_IRQS)
+ } else if (i == NR_IRQS) {
+ seq_printf(p, "NMI: ");
+ for_each_online_cpu(j)
+ seq_printf(p, "%10u ", cpu_pda[j].__nmi_count);
+ seq_printf(p, " CORE Non Maskable Interrupt\n");
seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));
+ }
return 0;
}
diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c
index eeee8cb..53d08de 100644
--- a/arch/blackfin/kernel/reboot.c
+++ b/arch/blackfin/kernel/reboot.c
@@ -20,8 +20,8 @@
* reset while the Core B bit (on dual core parts) is cleared by
* the core reset.
*/
-__attribute__((l1_text))
-static void _bfin_reset(void)
+__attribute__ ((__l1_text__, __noreturn__))
+static void bfin_reset(void)
{
/* Wait for completion of "system" events such as cache line
* line fills so that we avoid infinite stalls later on as
@@ -30,7 +30,11 @@ static void _bfin_reset(void)
*/
__builtin_bfin_ssync();
- while (1) {
+ /* The bootrom checks to see how it was reset and will
+ * automatically perform a software reset for us when
+ * it starts executing after the core reset.
+ */
+ if (ANOMALY_05000353 || ANOMALY_05000386) {
/* Initiate System software reset. */
bfin_write_SWRST(0x7);
@@ -50,6 +54,11 @@ static void _bfin_reset(void)
/* Clear System software reset */
bfin_write_SWRST(0);
+ /* The BF526 ROM will crash during reset */
+#if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
+ bfin_read_SWRST();
+#endif
+
/* Wait for the SWRST write to complete. Cannot rely on SSYNC
* though as the System state is all reset now.
*/
@@ -60,22 +69,11 @@ static void _bfin_reset(void)
: "a" (15 * 1)
: "LC1", "LB1", "LT1"
);
+ }
+ while (1)
/* Issue core reset */
asm("raise 1");
- }
-}
-
-static void bfin_reset(void)
-{
- if (ANOMALY_05000353 || ANOMALY_05000386)
- _bfin_reset();
- else
- /* the bootrom checks to see how it was reset and will
- * automatically perform a software reset for us when
- * it starts executing boot
- */
- asm("raise 1;");
}
__attribute__((weak))
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index b2a8113..e5c1162 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -60,7 +60,7 @@ void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
#define BFIN_MEMMAP_RAM 1
#define BFIN_MEMMAP_RESERVED 2
-struct bfin_memmap {
+static struct bfin_memmap {
int nr_map;
struct bfin_memmap_entry {
unsigned long long addr; /* start of memory segment */
@@ -824,7 +824,15 @@ void __init setup_arch(char **cmdline_p)
flash_probe();
#endif
+ printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
+
+ /* Newer parts mirror SWRST bits in SYSCR */
+#if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
+ defined(CONFIG_BF538) || defined(CONFIG_BF539)
_bfin_swrst = bfin_read_SWRST();
+#else
+ _bfin_swrst = bfin_read_SYSCR();
+#endif
#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
@@ -853,7 +861,7 @@ void __init setup_arch(char **cmdline_p)
else if (_bfin_swrst & RESET_SOFTWARE)
printk(KERN_NOTICE "Reset caused by Software reset\n");
- printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
+ printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
if (bfin_compiled_revid() == 0xffff)
printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
else if (bfin_compiled_revid() == -1)
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 5b0667d..ffe7fb5 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -673,6 +673,14 @@ static void decode_instruction(unsigned short *address)
verbose_printk("RTI");
else if (opcode == 0x0012)
verbose_printk("RTX");
+ else if (opcode == 0x0013)
+ verbose_printk("RTN");
+ else if (opcode == 0x0014)
+ verbose_printk("RTE");
+ else if (opcode == 0x0025)
+ verbose_printk("EMUEXCPT");
+ else if (opcode == 0x0040 && opcode <= 0x0047)
+ verbose_printk("STI R%i", opcode & 7);
else if (opcode >= 0x0050 && opcode <= 0x0057)
verbose_printk("JUMP (P%i)", opcode & 7);
else if (opcode >= 0x0060 && opcode <= 0x0067)
@@ -681,6 +689,10 @@ static void decode_instruction(unsigned short *address)
verbose_printk("CALL (PC+P%i)", opcode & 7);
else if (opcode >= 0x0080 && opcode <= 0x0087)
verbose_printk("JUMP (PC+P%i)", opcode & 7);
+ else if (opcode >= 0x0090 && opcode <= 0x009F)
+ verbose_printk("RAISE 0x%x", opcode & 0xF);
+ else if (opcode >= 0x00A0 && opcode <= 0x00AF)
+ verbose_printk("EXCPT 0x%x", opcode & 0xF);
else if ((opcode >= 0x1000 && opcode <= 0x13FF) || (opcode >= 0x1800 && opcode <= 0x1BFF))
verbose_printk("IF !CC JUMP");
else if ((opcode >= 0x1400 && opcode <= 0x17ff) || (opcode >= 0x1c00 && opcode <= 0x1fff))
@@ -820,11 +832,8 @@ void show_stack(struct task_struct *task, unsigned long *stack)
decode_address(buf, (unsigned int)stack);
printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf);
- addr = (unsigned int *)((unsigned int)stack & ~0x3F);
-
/* First thing is to look for a frame pointer */
- for (addr = (unsigned int *)((unsigned int)stack & ~0xF), i = 0;
- addr < endstack; addr++, i++) {
+ for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) {
if (*addr & 0x1)
continue;
ins_addr = (unsigned short *)*addr;
@@ -834,7 +843,8 @@ void show_stack(struct task_struct *task, unsigned long *stack)
if (fp) {
/* Let's check to see if it is a frame pointer */
- while (fp >= (addr - 1) && fp < endstack && fp)
+ while (fp >= (addr - 1) && fp < endstack
+ && fp && ((unsigned int) fp & 0x3) == 0)
fp = (unsigned int *)*fp;
if (fp == 0 || fp == endstack) {
fp = addr - 1;
@@ -1052,8 +1062,9 @@ void show_regs(struct pt_regs *fp)
char buf [150];
struct irqaction *action;
unsigned int i;
- unsigned long flags;
+ unsigned long flags = 0;
unsigned int cpu = smp_processor_id();
+ unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic();
verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted());
verbose_printk(KERN_NOTICE " SEQSTAT: %08lx IPEND: %04lx SYSCFG: %04lx\n",
@@ -1073,17 +1084,22 @@ void show_regs(struct pt_regs *fp)
}
verbose_printk(KERN_NOTICE " EXCAUSE : 0x%lx\n",
fp->seqstat & SEQSTAT_EXCAUSE);
- for (i = 6; i <= 15 ; i++) {
+ for (i = 2; i <= 15 ; i++) {
if (fp->ipend & (1 << i)) {
- decode_address(buf, bfin_read32(EVT0 + 4*i));
- verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf);
+ if (i != 4) {
+ decode_address(buf, bfin_read32(EVT0 + 4*i));
+ verbose_printk(KERN_NOTICE " physical IVG%i asserted : %s\n", i, buf);
+ } else
+ verbose_printk(KERN_NOTICE " interrupts disabled\n");
}
}
/* if no interrupts are going off, don't print this out */
if (fp->ipend & ~0x3F) {
for (i = 0; i < (NR_IRQS - 1); i++) {
- spin_lock_irqsave(&irq_desc[i].lock, flags);
+ if (!in_atomic)
+ spin_lock_irqsave(&irq_desc[i].lock, flags);
+
action = irq_desc[i].action;
if (!action)
goto unlock;
@@ -1096,7 +1112,8 @@ void show_regs(struct pt_regs *fp)
}
verbose_printk("\n");
unlock:
- spin_unlock_irqrestore(&irq_desc[i].lock, flags);
+ if (!in_atomic)
+ spin_unlock_irqrestore(&irq_desc[i].lock, flags);
}
}
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 15f1351..0e17534 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -46,6 +46,7 @@
#include <asm/dpmc.h>
#include <asm/bfin_sdh.h>
#include <linux/spi/ad7877.h>
+#include <net/dsa.h>
/*
* Name the Board for the /proc/cpuinfo
@@ -104,8 +105,31 @@ static struct platform_device rtc_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+ .name = "bfin_mii_bus",
+};
+
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
+ .dev.platform_data = &bfin_mii_bus,
+};
+#endif
+
+#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
+static struct dsa_platform_data ksz8893m_switch_data = {
+ .mii_bus = &bfin_mii_bus.dev,
+ .netdev = &bfin_mac_device.dev,
+ .port_names[0] = NULL,
+ .port_names[1] = "eth%d",
+ .port_names[2] = "eth%d",
+ .port_names[3] = "cpu",
+};
+
+static struct platform_device ksz8893m_switch_device = {
+ .name = "dsa",
+ .id = 0,
+ .num_resources = 0,
+ .dev.platform_data = &ksz8893m_switch_data,
};
#endif
@@ -147,6 +171,15 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
};
#endif
+#if defined(CONFIG_NET_DSA_KSZ8893M) \
+ || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
+/* SPI SWITCH CHIP */
+static struct bfin5xx_spi_chip spi_switch_info = {
+ .enable_dma = 0,
+ .bits_per_word = 8,
+};
+#endif
+
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
static struct bfin5xx_spi_chip spi_mmc_chip_info = {
.enable_dma = 1,
@@ -226,6 +259,19 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
},
#endif
+#if defined(CONFIG_NET_DSA_KSZ8893M) \
+ || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
+ {
+ .modalias = "ksz8893m",
+ .max_speed_hz = 5000000,
+ .bus_num = 0,
+ .chip_select = 1,
+ .platform_data = NULL,
+ .controller_data = &spi_switch_info,
+ .mode = SPI_MODE_3,
+ },
+#endif
+
#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
{
.modalias = "spi_mmc_dummy",
@@ -473,7 +519,6 @@ static struct platform_device i2c_bfin_twi_device = {
};
#endif
-#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
{
@@ -487,7 +532,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
-#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
@@ -584,9 +628,14 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+ &bfin_mii_bus,
&bfin_mac_device,
#endif
+#if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
+ &ksz8893m_switch_device,
+#endif
+
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
&bfin_spi0_device,
&bfin_spi1_device,
@@ -632,12 +681,8 @@ static struct platform_device *stamp_devices[] __initdata = {
static int __init ezbrd_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
-
-#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
-#endif
-
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
return 0;
@@ -649,7 +694,7 @@ void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
- bfin_gpio_reset_spi0_ssel1();
+ bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
void bfin_get_ether_addr(char *addr)
diff --git a/arch/blackfin/mach-bf518/include/mach/portmux.h b/arch/blackfin/mach-bf518/include/mach/portmux.h
index ac16d54..f618b48 100644
--- a/arch/blackfin/mach-bf518/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf518/include/mach/portmux.h
@@ -103,6 +103,8 @@
#define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2))
#define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2))
+#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
+
/* SPORT Port Mux */
#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0))
#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index a2c3578..856c097 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -403,8 +403,13 @@ static struct platform_device isp1362_hcd_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+ .name = "bfin_mii_bus",
+};
+
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
+ .dev.platform_data = &bfin_mii_bus,
};
#endif
@@ -793,7 +798,6 @@ static struct platform_device i2c_bfin_twi_device = {
};
#endif
-#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
{
@@ -809,7 +813,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
-#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
@@ -920,6 +923,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+ &bfin_mii_bus,
&bfin_mac_device,
#endif
@@ -968,27 +972,23 @@ static struct platform_device *stamp_devices[] __initdata = {
&bfin_gpios_device,
};
-static int __init stamp_init(void)
+static int __init cm_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
-
-#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
-#endif
-
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
return 0;
}
-arch_initcall(stamp_init);
+arch_initcall(cm_init);
void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
- bfin_gpio_reset_spi0_ssel1();
+ bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
void bfin_get_ether_addr(char *addr)
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index 0314bd3..83606fc 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -208,8 +208,13 @@ static struct platform_device rtc_device = {
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+ .name = "bfin_mii_bus",
+};
+
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
+ .dev.platform_data = &bfin_mii_bus,
};
#endif
@@ -590,7 +595,6 @@ static struct platform_device i2c_bfin_twi_device = {
};
#endif
-#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
{
@@ -604,7 +608,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
-#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
@@ -720,6 +723,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+ &bfin_mii_bus,
&bfin_mac_device,
#endif
@@ -764,27 +768,23 @@ static struct platform_device *stamp_devices[] __initdata = {
&bfin_gpios_device,
};
-static int __init stamp_init(void)
+static int __init ezbrd_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
-
-#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
-#endif
-
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
return 0;
}
-arch_initcall(stamp_init);
+arch_initcall(ezbrd_init);
void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
- bfin_gpio_reset_spi0_ssel1();
+ bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
void bfin_get_ether_addr(char *addr)
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 9454fb7..d086411 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -425,8 +425,13 @@ static struct platform_device isp1362_hcd_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+ .name = "bfin_mii_bus",
+};
+
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
+ .dev.platform_data = &bfin_mii_bus,
};
#endif
@@ -830,7 +835,6 @@ static struct platform_device i2c_bfin_twi_device = {
};
#endif
-#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
{
@@ -844,7 +848,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
-#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
@@ -988,6 +991,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+ &bfin_mii_bus,
&bfin_mac_device,
#endif
@@ -1048,27 +1052,23 @@ static struct platform_device *stamp_devices[] __initdata = {
&bfin_gpios_device,
};
-static int __init stamp_init(void)
+static int __init ezkit_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
-
-#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
-#endif
-
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
return 0;
}
-arch_initcall(stamp_init);
+arch_initcall(ezkit_init);
void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
- bfin_gpio_reset_spi0_ssel1();
+ bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
void bfin_get_ether_addr(char *addr)
diff --git a/arch/blackfin/mach-bf527/include/mach/portmux.h b/arch/blackfin/mach-bf527/include/mach/portmux.h
index 7f6da2c3..72b1652 100644
--- a/arch/blackfin/mach-bf527/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf527/include/mach/portmux.h
@@ -73,6 +73,8 @@
#define P_HWAIT (P_DONTCARE)
+#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
+
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(2))
#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(2))
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c
index 6ee607c..015c18f 100644
--- a/arch/blackfin/mach-bf533/boards/blackstamp.c
+++ b/arch/blackfin/mach-bf533/boards/blackstamp.c
@@ -309,10 +309,8 @@ static struct platform_device i2c_gpio_device = {
};
#endif
-#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
};
-#endif
static const unsigned int cclk_vlev_datasheet[] =
{
@@ -390,10 +388,8 @@ static int __init blackstamp_init(void)
printk(KERN_INFO "%s(): registering device resources\n", __func__);
-#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
-#endif
ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
if (ret < 0)
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 07f9ad1..db96f33 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -441,7 +441,6 @@ static struct platform_device i2c_gpio_device = {
};
#endif
-#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
{
@@ -461,7 +460,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
-#endif
static const unsigned int cclk_vlev_datasheet[] =
{
@@ -550,10 +548,8 @@ static int __init stamp_init(void)
printk(KERN_INFO "%s(): registering device resources\n", __func__);
-#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
-#endif
ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
if (ret < 0)
diff --git a/arch/blackfin/mach-bf533/include/mach/portmux.h b/arch/blackfin/mach-bf533/include/mach/portmux.h
index 685a265..2f59ce0 100644
--- a/arch/blackfin/mach-bf533/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf533/include/mach/portmux.h
@@ -54,14 +54,11 @@
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2))
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1))
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0))
+#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
#define P_TMR2 (P_DONTCARE)
#define P_TMR1 (P_DONTCARE)
#define P_TMR0 (P_DONTCARE)
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF1))
-
-
-
-
#endif /* _MACH_PORTMUX_H_ */
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index 6ac8e4d..9cd8fb2 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -479,8 +479,13 @@ static struct platform_device bfin_sport1_uart_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+ .name = "bfin_mii_bus",
+};
+
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
+ .dev.platform_data = &bfin_mii_bus,
};
#endif
@@ -591,6 +596,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+ &bfin_mii_bus,
&bfin_mac_device,
#endif
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
index dd6e6bf..da710fd 100644
--- a/arch/blackfin/mach-bf537/boards/generic_board.c
+++ b/arch/blackfin/mach-bf537/boards/generic_board.c
@@ -262,8 +262,13 @@ static struct platform_device isp1362_hcd_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+ .name = "bfin_mii_bus",
+};
+
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
+ .dev.platform_data = &bfin_mii_bus,
};
#endif
@@ -662,6 +667,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+ &bfin_mii_bus,
&bfin_mac_device,
#endif
@@ -708,7 +714,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
};
-static int __init stamp_init(void)
+static int __init generic_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
@@ -720,13 +726,13 @@ static int __init stamp_init(void)
return 0;
}
-arch_initcall(stamp_init);
+arch_initcall(generic_init);
void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
- bfin_gpio_reset_spi0_ssel1();
+ bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index bb79534..db7d3a3 100644
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -61,8 +61,13 @@ static struct platform_device rtc_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+ .name = "bfin_mii_bus",
+};
+
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
+ .dev.platform_data = &bfin_mii_bus,
};
#endif
@@ -324,6 +329,7 @@ static struct platform_device *minotaur_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+ &bfin_mii_bus,
&bfin_mac_device,
#endif
@@ -377,5 +383,5 @@ void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
- bfin_gpio_reset_spi0_ssel1();
+ bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 89de94f..590eb3a 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -198,8 +198,13 @@ static struct platform_device isp1362_hcd_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+ .name = "bfin_mii_bus",
+};
+
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
+ .dev.platform_data = &bfin_mii_bus,
};
#endif
@@ -529,6 +534,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+ &bfin_mii_bus,
&bfin_mac_device,
#endif
@@ -558,7 +564,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
};
-static int __init stamp_init(void)
+static int __init pnav_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
@@ -569,7 +575,7 @@ static int __init stamp_init(void)
return 0;
}
-arch_initcall(stamp_init);
+arch_initcall(pnav_init);
void bfin_get_ether_addr(char *addr)
{
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index d812e25..cd04c5e 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -321,8 +321,13 @@ static struct platform_device isp1362_hcd_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+ .name = "bfin_mii_bus",
+};
+
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
+ .dev.platform_data = &bfin_mii_bus,
};
#endif
@@ -1068,7 +1073,6 @@ static struct adp5588_kpad_platform_data adp5588_kpad_data = {
};
#endif
-#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
{
@@ -1102,7 +1106,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
},
#endif
};
-#endif
#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
static struct platform_device bfin_sport0_uart_device = {
@@ -1217,6 +1220,7 @@ static struct platform_device *stamp_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+ &bfin_mii_bus,
&bfin_mac_device,
#endif
@@ -1284,12 +1288,8 @@ static struct platform_device *stamp_devices[] __initdata = {
static int __init stamp_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
-
-#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info,
ARRAY_SIZE(bfin_i2c_board_info));
-#endif
-
bfin_plat_nand_init();
platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
@@ -1307,7 +1307,7 @@ void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
- bfin_gpio_reset_spi0_ssel1();
+ bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
/*
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
index 2f4b066..3f4f203 100644
--- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -481,8 +481,13 @@ static struct platform_device bfin_sport1_uart_device = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+ .name = "bfin_mii_bus",
+};
+
static struct platform_device bfin_mac_device = {
.name = "bfin_mac",
+ .dev.platform_data = &bfin_mii_bus,
};
#endif
@@ -593,6 +598,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+ &bfin_mii_bus,
&bfin_mac_device,
#endif
@@ -615,7 +621,7 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
&bfin_gpios_device,
};
-static int __init cm_bf537_init(void)
+static int __init tcm_bf537_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
@@ -629,7 +635,7 @@ static int __init cm_bf537_init(void)
return 0;
}
-arch_initcall(cm_bf537_init);
+arch_initcall(tcm_bf537_init);
void bfin_get_ether_addr(char *addr)
{
diff --git a/arch/blackfin/mach-bf537/include/mach/portmux.h b/arch/blackfin/mach-bf537/include/mach/portmux.h
index 78fee6e..87285e7 100644
--- a/arch/blackfin/mach-bf537/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf537/include/mach/portmux.h
@@ -31,6 +31,7 @@
#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))
#define P_TACLK0 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
+#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
#define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))
#define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
diff --git a/arch/blackfin/mach-bf538/include/mach/portmux.h b/arch/blackfin/mach-bf538/include/mach/portmux.h
index 1e031b5..c8db264 100644
--- a/arch/blackfin/mach-bf538/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf538/include/mach/portmux.h
@@ -102,5 +102,6 @@
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2))
#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1))
#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0))
+#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
#endif /* _MACH_PORTMUX_H_ */
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 309c160..096e661 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -781,7 +781,6 @@ static struct platform_device i2c_bfin_twi1_device = {
#endif
#endif
-#ifdef CONFIG_I2C_BOARDINFO
static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
};
@@ -800,7 +799,6 @@ static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
#endif
};
#endif
-#endif
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
#include <linux/gpio_keys.h>
@@ -956,14 +954,12 @@ static int __init ezkit_init(void)
{
printk(KERN_INFO "%s(): registering device resources\n", __func__);
-#ifdef CONFIG_I2C_BOARDINFO
i2c_register_board_info(0, bfin_i2c_board_info0,
ARRAY_SIZE(bfin_i2c_board_info0));
#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
i2c_register_board_info(1, bfin_i2c_board_info1,
ARRAY_SIZE(bfin_i2c_board_info1));
#endif
-#endif
platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index 3b54309..23d03c5 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -175,6 +175,7 @@
#define ANOMALY_05000311 (0)
#define ANOMALY_05000323 (0)
#define ANOMALY_05000363 (0)
+#define ANOMALY_05000380 (0)
#define ANOMALY_05000412 (0)
#define ANOMALY_05000432 (0)
#define ANOMALY_05000435 (0)
diff --git a/arch/blackfin/mach-bf548/include/mach/bf548.h b/arch/blackfin/mach-bf548/include/mach/bf548.h
index f0e5699..cd31f72 100644
--- a/arch/blackfin/mach-bf548/include/mach/bf548.h
+++ b/arch/blackfin/mach-bf548/include/mach/bf548.h
@@ -104,6 +104,18 @@
#define AMGCTLVAL (V_AMBEN | V_AMCKEN)
+#if defined(CONFIG_BF542M)
+# define CONFIG_BF542
+#elif defined(CONFIG_BF544M)
+# define CONFIG_BF544
+#elif defined(CONFIG_BF547M)
+# define CONFIG_BF547
+#elif defined(CONFIG_BF548M)
+# define CONFIG_BF548
+#elif defined(CONFIG_BF549M)
+# define CONFIG_BF549
+#endif
+
#if defined(CONFIG_BF542)
# define CPU "BF542"
# define CPUID 0x27de
diff --git a/arch/blackfin/mach-bf548/include/mach/gpio.h b/arch/blackfin/mach-bf548/include/mach/gpio.h
index bba82dc..3a20517 100644
--- a/arch/blackfin/mach-bf548/include/mach/gpio.h
+++ b/arch/blackfin/mach-bf548/include/mach/gpio.h
@@ -195,17 +195,17 @@
struct gpio_port_t {
unsigned short port_fer;
unsigned short dummy1;
- unsigned short port_data;
+ unsigned short data;
unsigned short dummy2;
- unsigned short port_set;
+ unsigned short data_set;
unsigned short dummy3;
- unsigned short port_clear;
+ unsigned short data_clear;
unsigned short dummy4;
- unsigned short port_dir_set;
+ unsigned short dir_set;
unsigned short dummy5;
- unsigned short port_dir_clear;
+ unsigned short dir_clear;
unsigned short dummy6;
- unsigned short port_inen;
+ unsigned short inen;
unsigned short dummy7;
unsigned int port_mux;
};
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h b/arch/blackfin/mach-bf548/include/mach/portmux.h
index 8177a56..ffb1d0a 100644
--- a/arch/blackfin/mach-bf548/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf548/include/mach/portmux.h
@@ -125,6 +125,7 @@
#define P_KEY_COL2 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3))
#define P_KEY_COL3 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3))
+#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0))
#define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0))
#define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0))
diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h
index d7c5097..cf92229 100644
--- a/arch/blackfin/mach-bf561/include/mach/defBF561.h
+++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h
@@ -1106,6 +1106,8 @@
#define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */
#define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */
#define POL 0x0000C000 /* PPI Signal Polarities */
+#define POLC 0x4000 /* PPI Clock Polarity */
+#define POLS 0x8000 /* PPI Frame Sync Polarity */
/* PPI_STATUS Masks */
#define FLD 0x00000400 /* Field Indicator */
diff --git a/arch/blackfin/mach-bf561/include/mach/portmux.h b/arch/blackfin/mach-bf561/include/mach/portmux.h
index a6ee820..2e5ad63 100644
--- a/arch/blackfin/mach-bf561/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf561/include/mach/portmux.h
@@ -85,5 +85,6 @@
#define P_SPI0_MOSI (P_DONTCARE)
#define P_SPI0_MISO (P_DONTCARE)
#define P_SPI0_SCK (P_DONTCARE)
+#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
#endif /* _MACH_PORTMUX_H_ */
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c
index 5d182ab..9dddb6f 100644
--- a/arch/blackfin/mach-common/clocks-init.c
+++ b/arch/blackfin/mach-common/clocks-init.c
@@ -14,6 +14,7 @@
#include <asm/clocks.h>
#include <asm/mem_init.h>
+#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */
#define PLL_CTL_VAL \
(((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \
(PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0))
@@ -76,7 +77,7 @@ void init_clocks(void)
bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
#ifdef EBIU_SDGCTL
bfin_write_EBIU_SDRRC(mem_SDRRC);
- bfin_write_EBIU_SDGCTL(mem_SDGCTL);
+ bfin_write_EBIU_SDGCTL((bfin_read_EBIU_SDGCTL() & SDGCTL_WIDTH) | mem_SDGCTL);
#else
bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() & ~(SRREQ));
do_sync();
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index fae7746..88de053 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -151,13 +151,6 @@ ENTRY(_ex_syscall)
jump.s _bfin_return_from_exception;
ENDPROC(_ex_syscall)
-ENTRY(_ex_soft_bp)
- r7 = retx;
- r7 += -2;
- retx = r7;
- jump.s _ex_trap_c;
-ENDPROC(_ex_soft_bp)
-
ENTRY(_ex_single_step)
/* If we just returned from an interrupt, the single step event is
for the RTI instruction. */
@@ -1087,7 +1080,7 @@ ENTRY(_ex_table)
* EXCPT instruction can provide 4 bits of EXCAUSE, allowing 16 to be user defined
*/
.long _ex_syscall /* 0x00 - User Defined - Linux Syscall */
- .long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */
+ .long _ex_trap_c /* 0x01 - User Defined - Software breakpoint */
#ifdef CONFIG_KGDB
.long _ex_trap_c /* 0x02 - User Defined - KGDB initial connection
and break signal trap */
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
index e1e42c0..698d4c0 100644
--- a/arch/blackfin/mach-common/head.S
+++ b/arch/blackfin/mach-common/head.S
@@ -17,6 +17,19 @@
__INIT
+ENTRY(__init_clear_bss)
+ r2 = r2 - r1;
+ cc = r2 == 0;
+ if cc jump .L_bss_done;
+ r2 >>= 2;
+ p1 = r1;
+ p2 = r2;
+ lsetup (1f, 1f) lc0 = p2;
+1: [p1++] = r0;
+.L_bss_done:
+ rts;
+ENDPROC(__init_clear_bss)
+
#define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
ENTRY(__start)
@@ -144,6 +157,35 @@ ENTRY(__start)
call _init_early_exception_vectors;
#endif
+ r0 = 0 (x);
+ /* Zero out all of the fun bss regions */
+#if L1_DATA_A_LENGTH > 0
+ r1.l = __sbss_l1;
+ r1.h = __sbss_l1;
+ r2.l = __ebss_l1;
+ r2.h = __ebss_l1;
+ call __init_clear_bss
+#endif
+#if L1_DATA_B_LENGTH > 0
+ r1.l = __sbss_b_l1;
+ r1.h = __sbss_b_l1;
+ r2.l = __ebss_b_l1;
+ r2.h = __ebss_b_l1;
+ call __init_clear_bss
+#endif
+#if L2_LENGTH > 0
+ r1.l = __sbss_l2;
+ r1.h = __sbss_l2;
+ r2.l = __ebss_l2;
+ r2.h = __ebss_l2;
+ call __init_clear_bss
+#endif
+ r1.l = ___bss_start;
+ r1.h = ___bss_start;
+ r2.l = ___bss_stop;
+ r2.h = ___bss_stop;
+ call __init_clear_bss
+
/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
call _bfin_relocate_l1_mem;
#ifdef CONFIG_BFIN_KERNEL_CLOCK
@@ -185,19 +227,6 @@ ENDPROC(__start)
# define WDOG_CTL WDOGA_CTL
#endif
-ENTRY(__init_clear_bss)
- r2 = r2 - r1;
- cc = r2 == 0;
- if cc jump .L_bss_done;
- r2 >>= 2;
- p1 = r1;
- p2 = r2;
- lsetup (1f, 1f) lc0 = p2;
-1: [p1++] = r0;
-.L_bss_done:
- rts;
-ENDPROC(__init_clear_bss)
-
ENTRY(_real_start)
/* Enable nested interrupts */
[--sp] = reti;
@@ -209,35 +238,6 @@ ENTRY(_real_start)
w[p0] = r0;
ssync;
- r0 = 0 (x);
- /* Zero out all of the fun bss regions */
-#if L1_DATA_A_LENGTH > 0
- r1.l = __sbss_l1;
- r1.h = __sbss_l1;
- r2.l = __ebss_l1;
- r2.h = __ebss_l1;
- call __init_clear_bss
-#endif
-#if L1_DATA_B_LENGTH > 0
- r1.l = __sbss_b_l1;
- r1.h = __sbss_b_l1;
- r2.l = __ebss_b_l1;
- r2.h = __ebss_b_l1;
- call __init_clear_bss
-#endif
-#if L2_LENGTH > 0
- r1.l = __sbss_l2;
- r1.h = __sbss_l2;
- r2.l = __ebss_l2;
- r2.h = __ebss_l2;
- call __init_clear_bss
-#endif
- r1.l = ___bss_start;
- r1.h = ___bss_start;
- r2.l = ___bss_stop;
- r2.h = ___bss_stop;
- call __init_clear_bss
-
/* Pass the u-boot arguments to the global value command line */
R0 = R7;
call _cmdline_init;
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 473df0f..43c4eb9 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -195,7 +195,7 @@ ENDPROC(_evt_ivhw)
/* Interrupt routine for evt2 (NMI).
* We don't actually use this, so just return.
* For inner circle type details, please see:
- * http://docs.blackfin.uclinux.org/doku.php?id=linux:nmi
+ * http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:nmi
*/
ENTRY(_evt_nmi)
.weak _evt_nmi
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 1bba603..2024945 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -1101,10 +1101,9 @@ int __init init_arch_irq(void)
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \
- || defined(BF538_FAMILY) || defined(CONFIG_BF51x)
+#ifdef SIC_IWR0
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
-#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
+# ifdef SIC_IWR1
/* BF52x/BF51x system reset does not properly reset SIC_IWR1 which
* will screw up the bootrom as it relies on MDMA0/1 waking it
* up from IDLE instructions. See this report for more info:
@@ -1114,10 +1113,8 @@ int __init init_arch_irq(void)
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
-#else
- bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
-#endif
-# ifdef CONFIG_BF54x
+# endif
+# ifdef SIC_IWR2
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif
#else
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index d3d70fd..f48a6ae 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -82,10 +82,9 @@ void bfin_pm_suspend_standby_enter(void)
bfin_pm_standby_restore();
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \
- defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x)
+#ifdef SIC_IWR0
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
-#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
+# ifdef SIC_IWR1
/* BF52x system reset does not properly reset SIC_IWR1 which
* will screw up the bootrom as it relies on MDMA0/1 waking it
* up from IDLE instructions. See this report for more info:
@@ -95,10 +94,8 @@ void bfin_pm_suspend_standby_enter(void)
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
-#else
- bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
-#endif
-# ifdef CONFIG_BF54x
+# endif
+# ifdef SIC_IWR2
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif
#else
diff --git a/arch/sparc/include/asm/cpudata_64.h b/arch/sparc/include/asm/cpudata_64.h
index 7da7c13..a11b89e 100644
--- a/arch/sparc/include/asm/cpudata_64.h
+++ b/arch/sparc/include/asm/cpudata_64.h
@@ -17,7 +17,7 @@
typedef struct {
/* Dcache line 1 */
unsigned int __softirq_pending; /* must be 1st, see rtrap.S */
- unsigned int __pad0;
+ unsigned int __nmi_count;
unsigned long clock_tick; /* %tick's per second */
unsigned long __pad;
unsigned int __pad1;
diff --git a/arch/sparc/include/asm/irq_64.h b/arch/sparc/include/asm/irq_64.h
index d47d4a1..1934f2c 100644
--- a/arch/sparc/include/asm/irq_64.h
+++ b/arch/sparc/include/asm/irq_64.h
@@ -66,9 +66,6 @@ extern void virt_irq_free(unsigned int virt_irq);
extern void __init init_IRQ(void);
extern void fixup_irqs(void);
-extern int register_perfctr_intr(void (*handler)(struct pt_regs *));
-extern void release_perfctr_intr(void (*handler)(struct pt_regs *));
-
static inline void set_softint(unsigned long bits)
{
__asm__ __volatile__("wr %0, 0x0, %%set_softint"
@@ -98,5 +95,6 @@ void __trigger_all_cpu_backtrace(void);
extern void *hardirq_stack[NR_CPUS];
extern void *softirq_stack[NR_CPUS];
#define __ARCH_HAS_DO_SOFTIRQ
+#define ARCH_HAS_NMI_WATCHDOG
#endif
diff --git a/arch/sparc/include/asm/kdebug_64.h b/arch/sparc/include/asm/kdebug_64.h
index f905b77..feb3578 100644
--- a/arch/sparc/include/asm/kdebug_64.h
+++ b/arch/sparc/include/asm/kdebug_64.h
@@ -14,6 +14,8 @@ enum die_val {
DIE_TRAP,
DIE_TRAP_TL1,
DIE_CALL,
+ DIE_NMI,
+ DIE_NMIWATCHDOG,
};
#endif
diff --git a/arch/sparc/include/asm/nmi.h b/arch/sparc/include/asm/nmi.h
new file mode 100644
index 0000000..fbd546d
--- /dev/null
+++ b/arch/sparc/include/asm/nmi.h
@@ -0,0 +1,10 @@
+#ifndef __NMI_H
+#define __NMI_H
+
+extern int __init nmi_init(void);
+extern void perfctr_irq(int irq, struct pt_regs *regs);
+extern void nmi_adjust_hz(unsigned int new_hz);
+
+extern int nmi_usable;
+
+#endif /* __NMI_H */
diff --git a/arch/sparc/include/asm/pcr.h b/arch/sparc/include/asm/pcr.h
new file mode 100644
index 0000000..a2f5c61
--- /dev/null
+++ b/arch/sparc/include/asm/pcr.h
@@ -0,0 +1,46 @@
+#ifndef __PCR_H
+#define __PCR_H
+
+struct pcr_ops {
+ u64 (*read)(void);
+ void (*write)(u64);
+};
+extern const struct pcr_ops *pcr_ops;
+
+extern void deferred_pcr_work_irq(int irq, struct pt_regs *regs);
+extern void schedule_deferred_pcr_work(void);
+
+#define PCR_PIC_PRIV 0x00000001 /* PIC access is privileged */
+#define PCR_STRACE 0x00000002 /* Trace supervisor events */
+#define PCR_UTRACE 0x00000004 /* Trace user events */
+#define PCR_N2_HTRACE 0x00000008 /* Trace hypervisor events */
+#define PCR_N2_TOE_OV0 0x00000010 /* Trap if PIC 0 overflows */
+#define PCR_N2_TOE_OV1 0x00000020 /* Trap if PIC 1 overflows */
+#define PCR_N2_MASK0 0x00003fc0
+#define PCR_N2_MASK0_SHIFT 6
+#define PCR_N2_SL0 0x0003c000
+#define PCR_N2_SL0_SHIFT 14
+#define PCR_N2_OV0 0x00040000
+#define PCR_N2_MASK1 0x07f80000
+#define PCR_N2_MASK1_SHIFT 19
+#define PCR_N2_SL1 0x78000000
+#define PCR_N2_SL1_SHIFT 27
+#define PCR_N2_OV1 0x80000000
+
+extern unsigned int picl_shift;
+
+/* In order to commonize as much of the implementation as
+ * possible, we use PICH as our counter. Mostly this is
+ * to accomodate Niagara-1 which can only count insn cycles
+ * in PICH.
+ */
+static inline u64 picl_value(unsigned int nmi_hz)
+{
+ u32 delta = local_cpu_data().clock_tick / (nmi_hz << picl_shift);
+
+ return ((u64)((0 - delta) & 0xffffffff)) << 32;
+}
+
+extern u64 pcr_enable;
+
+#endif /* __PCR_H */
diff --git a/arch/sparc/include/asm/pil.h b/arch/sparc/include/asm/pil.h
index d573820..32a7efe 100644
--- a/arch/sparc/include/asm/pil.h
+++ b/arch/sparc/include/asm/pil.h
@@ -23,6 +23,7 @@
#define PIL_SMP_CTX_NEW_VERSION 4
#define PIL_DEVICE_IRQ 5
#define PIL_SMP_CALL_FUNC_SNGL 6
+#define PIL_DEFERRED_PCR_WORK 7
#define PIL_NORMAL_MAX 14
#define PIL_NMI 15
diff --git a/arch/sparc/kernel/Makefile b/arch/sparc/kernel/Makefile
index 53adcaa..54742e5 100644
--- a/arch/sparc/kernel/Makefile
+++ b/arch/sparc/kernel/Makefile
@@ -52,6 +52,8 @@ obj-$(CONFIG_SPARC64) += visemul.o
obj-$(CONFIG_SPARC64) += hvapi.o
obj-$(CONFIG_SPARC64) += sstate.o
obj-$(CONFIG_SPARC64) += mdesc.o
+obj-$(CONFIG_SPARC64) += pcr.o
+obj-$(CONFIG_SPARC64) += nmi.o
# sparc32 do not use GENERIC_HARDIRQS but uses the generic devres implementation
obj-$(CONFIG_SPARC32) += devres.o
diff --git a/arch/sparc/kernel/cpu.c b/arch/sparc/kernel/cpu.c
index 32d32b4..d85c3dc 100644
--- a/arch/sparc/kernel/cpu.c
+++ b/arch/sparc/kernel/cpu.c
@@ -26,6 +26,7 @@ EXPORT_PER_CPU_SYMBOL(__cpu_data);
struct cpu_info {
int psr_vers;
const char *name;
+ const char *pmu_name;
};
struct fpu_info {
@@ -45,6 +46,9 @@ struct manufacturer_info {
#define CPU(ver, _name) \
{ .psr_vers = ver, .name = _name }
+#define CPU_PMU(ver, _name, _pmu_name) \
+{ .psr_vers = ver, .name = _name, .pmu_name = _pmu_name }
+
#define FPU(ver, _name) \
{ .fp_vers = ver, .name = _name }
@@ -183,10 +187,10 @@ static const struct manufacturer_info __initconst manufacturer_info[] = {
},{
0x17,
.cpu_info = {
- CPU(0x10, "TI UltraSparc I (SpitFire)"),
- CPU(0x11, "TI UltraSparc II (BlackBird)"),
- CPU(0x12, "TI UltraSparc IIi (Sabre)"),
- CPU(0x13, "TI UltraSparc IIe (Hummingbird)"),
+ CPU_PMU(0x10, "TI UltraSparc I (SpitFire)", "ultra12"),
+ CPU_PMU(0x11, "TI UltraSparc II (BlackBird)", "ultra12"),
+ CPU_PMU(0x12, "TI UltraSparc IIi (Sabre)", "ultra12"),
+ CPU_PMU(0x13, "TI UltraSparc IIe (Hummingbird)", "ultra12"),
CPU(-1, NULL)
},
.fpu_info = {
@@ -199,7 +203,7 @@ static const struct manufacturer_info __initconst manufacturer_info[] = {
},{
0x22,
.cpu_info = {
- CPU(0x10, "TI UltraSparc I (SpitFire)"),
+ CPU_PMU(0x10, "TI UltraSparc I (SpitFire)", "ultra12"),
CPU(-1, NULL)
},
.fpu_info = {
@@ -209,12 +213,12 @@ static const struct manufacturer_info __initconst manufacturer_info[] = {
},{
0x3e,
.cpu_info = {
- CPU(0x14, "TI UltraSparc III (Cheetah)"),
- CPU(0x15, "TI UltraSparc III+ (Cheetah+)"),
- CPU(0x16, "TI UltraSparc IIIi (Jalapeno)"),
- CPU(0x18, "TI UltraSparc IV (Jaguar)"),
- CPU(0x19, "TI UltraSparc IV+ (Panther)"),
- CPU(0x22, "TI UltraSparc IIIi+ (Serrano)"),
+ CPU_PMU(0x14, "TI UltraSparc III (Cheetah)", "ultra3"),
+ CPU_PMU(0x15, "TI UltraSparc III+ (Cheetah+)", "ultra3+"),
+ CPU_PMU(0x16, "TI UltraSparc IIIi (Jalapeno)", "ultra3i"),
+ CPU_PMU(0x18, "TI UltraSparc IV (Jaguar)", "ultra3+"),
+ CPU_PMU(0x19, "TI UltraSparc IV+ (Panther)", "ultra4+"),
+ CPU_PMU(0x22, "TI UltraSparc IIIi+ (Serrano)", "ultra3i"),
CPU(-1, NULL)
},
.fpu_info = {
@@ -234,6 +238,7 @@ static const struct manufacturer_info __initconst manufacturer_info[] = {
const char *sparc_cpu_type;
const char *sparc_fpu_type;
+const char *sparc_pmu_type;
unsigned int fsr_storage;
@@ -244,6 +249,7 @@ static void set_cpu_and_fpu(int psr_impl, int psr_vers, int fpu_vers)
sparc_cpu_type = NULL;
sparc_fpu_type = NULL;
+ sparc_pmu_type = NULL;
manuf = NULL;
for (i = 0; i < ARRAY_SIZE(manufacturer_info); i++)
@@ -263,6 +269,7 @@ static void set_cpu_and_fpu(int psr_impl, int psr_vers, int fpu_vers)
{
if (cpu->psr_vers == psr_vers) {
sparc_cpu_type = cpu->name;
+ sparc_pmu_type = cpu->pmu_name;
sparc_fpu_type = "No FPU";
break;
}
@@ -290,6 +297,8 @@ static void set_cpu_and_fpu(int psr_impl, int psr_vers, int fpu_vers)
psr_impl, fpu_vers);
sparc_fpu_type = "Unknown FPU";
}
+ if (sparc_pmu_type == NULL)
+ sparc_pmu_type = "Unknown PMU";
}
#ifdef CONFIG_SPARC32
@@ -315,11 +324,13 @@ static void __init sun4v_cpu_probe(void)
case SUN4V_CHIP_NIAGARA1:
sparc_cpu_type = "UltraSparc T1 (Niagara)";
sparc_fpu_type = "UltraSparc T1 integrated FPU";
+ sparc_pmu_type = "niagara";
break;
case SUN4V_CHIP_NIAGARA2:
sparc_cpu_type = "UltraSparc T2 (Niagara2)";
sparc_fpu_type = "UltraSparc T2 integrated FPU";
+ sparc_pmu_type = "niagara2";
break;
default:
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index cab8e028..e289376 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -196,6 +196,11 @@ int show_interrupts(struct seq_file *p, void *v)
seq_putc(p, '\n');
skip:
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
+ } else if (i == NR_IRQS) {
+ seq_printf(p, "NMI: ");
+ for_each_online_cpu(j)
+ seq_printf(p, "%10u ", cpu_data(j).__nmi_count);
+ seq_printf(p, " Non-maskable interrupts\n");
}
return 0;
}
@@ -778,69 +783,6 @@ void do_softirq(void)
local_irq_restore(flags);
}
-static void unhandled_perf_irq(struct pt_regs *regs)
-{
- unsigned long pcr, pic;
-
- read_pcr(pcr);
- read_pic(pic);
-
- write_pcr(0);
-
- printk(KERN_EMERG "CPU %d: Got unexpected perf counter IRQ.\n",
- smp_processor_id());
- printk(KERN_EMERG "CPU %d: PCR[%016lx] PIC[%016lx]\n",
- smp_processor_id(), pcr, pic);
-}
-
-/* Almost a direct copy of the powerpc PMC code. */
-static DEFINE_SPINLOCK(perf_irq_lock);
-static void *perf_irq_owner_caller; /* mostly for debugging */
-static void (*perf_irq)(struct pt_regs *regs) = unhandled_perf_irq;
-
-/* Invoked from level 15 PIL handler in trap table. */
-void perfctr_irq(int irq, struct pt_regs *regs)
-{
- clear_softint(1 << irq);
- perf_irq(regs);
-}
-
-int register_perfctr_intr(void (*handler)(struct pt_regs *))
-{
- int ret;
-
- if (!handler)
- return -EINVAL;
-
- spin_lock(&perf_irq_lock);
- if (perf_irq != unhandled_perf_irq) {
- printk(KERN_WARNING "register_perfctr_intr: "
- "perf IRQ busy (reserved by caller %p)\n",
- perf_irq_owner_caller);
- ret = -EBUSY;
- goto out;
- }
-
- perf_irq_owner_caller = __builtin_return_address(0);
- perf_irq = handler;
-
- ret = 0;
-out:
- spin_unlock(&perf_irq_lock);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(register_perfctr_intr);
-
-void release_perfctr_intr(void (*handler)(struct pt_regs *))
-{
- spin_lock(&perf_irq_lock);
- perf_irq_owner_caller = NULL;
- perf_irq = unhandled_perf_irq;
- spin_unlock(&perf_irq_lock);
-}
-EXPORT_SYMBOL_GPL(release_perfctr_intr);
-
#ifdef CONFIG_HOTPLUG_CPU
void fixup_irqs(void)
{
diff --git a/arch/sparc/kernel/kernel.h b/arch/sparc/kernel/kernel.h
index 81a972e..15d8a3f 100644
--- a/arch/sparc/kernel/kernel.h
+++ b/arch/sparc/kernel/kernel.h
@@ -5,6 +5,7 @@
/* cpu.c */
extern const char *sparc_cpu_type;
+extern const char *sparc_pmu_type;
extern const char *sparc_fpu_type;
extern unsigned int fsr_storage;
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
new file mode 100644
index 0000000..09f088e
--- /dev/null
+++ b/arch/sparc/kernel/nmi.c
@@ -0,0 +1,224 @@
+/* Pseudo NMI support on sparc64 systems.
+ *
+ * Copyright (C) 2009 David S. Miller <davem@davemloft.net>
+ *
+ * The NMI watchdog support and infrastructure is based almost
+ * entirely upon the x86 NMI support code.
+ */
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/percpu.h>
+#include <linux/nmi.h>
+#include <linux/module.h>
+#include <linux/kprobes.h>
+#include <linux/kernel_stat.h>
+#include <linux/slab.h>
+#include <linux/kdebug.h>
+#include <linux/delay.h>
+#include <linux/smp.h>
+
+#include <asm/ptrace.h>
+#include <asm/local.h>
+#include <asm/pcr.h>
+
+/* We don't have a real NMI on sparc64, but we can fake one
+ * up using profiling counter overflow interrupts and interrupt
+ * levels.
+ *
+ * The profile overflow interrupts at level 15, so we use
+ * level 14 as our IRQ off level.
+ */
+
+static int nmi_watchdog_active;
+static int panic_on_timeout;
+
+int nmi_usable;
+EXPORT_SYMBOL_GPL(nmi_usable);
+
+static unsigned int nmi_hz = HZ;
+
+static DEFINE_PER_CPU(unsigned int, last_irq_sum);
+static DEFINE_PER_CPU(local_t, alert_counter);
+static DEFINE_PER_CPU(int, nmi_touch);
+
+void touch_nmi_watchdog(void)
+{
+ if (nmi_watchdog_active) {
+ int cpu;
+
+ for_each_present_cpu(cpu) {
+ if (per_cpu(nmi_touch, cpu) != 1)
+ per_cpu(nmi_touch, cpu) = 1;
+ }
+ }
+
+ touch_softlockup_watchdog();
+}
+EXPORT_SYMBOL(touch_nmi_watchdog);
+
+static void die_nmi(const char *str, struct pt_regs *regs, int do_panic)
+{
+ if (notify_die(DIE_NMIWATCHDOG, str, regs, 0,
+ pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
+ return;
+
+ console_verbose();
+ bust_spinlocks(1);
+
+ printk(KERN_EMERG "%s", str);
+ printk(" on CPU%d, ip %08lx, registers:\n",
+ smp_processor_id(), regs->tpc);
+ show_regs(regs);
+
+ bust_spinlocks(0);
+
+ if (do_panic || panic_on_oops)
+ panic("Non maskable interrupt");
+
+ local_irq_enable();
+ do_exit(SIGBUS);
+}
+
+notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
+{
+ unsigned int sum, touched = 0;
+ int cpu = smp_processor_id();
+
+ clear_softint(1 << irq);
+ pcr_ops->write(PCR_PIC_PRIV);
+
+ local_cpu_data().__nmi_count++;
+
+ if (notify_die(DIE_NMI, "nmi", regs, 0,
+ pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
+ touched = 1;
+
+ sum = kstat_irqs_cpu(0, cpu);
+ if (__get_cpu_var(nmi_touch)) {
+ __get_cpu_var(nmi_touch) = 0;
+ touched = 1;
+ }
+ if (!touched && __get_cpu_var(last_irq_sum) == sum) {
+ local_inc(&__get_cpu_var(alert_counter));
+ if (local_read(&__get_cpu_var(alert_counter)) == 5 * nmi_hz)
+ die_nmi("BUG: NMI Watchdog detected LOCKUP",
+ regs, panic_on_timeout);
+ } else {
+ __get_cpu_var(last_irq_sum) = sum;
+ local_set(&__get_cpu_var(alert_counter), 0);
+ }
+ if (nmi_usable) {
+ write_pic(picl_value(nmi_hz));
+ pcr_ops->write(pcr_enable);
+ }
+}
+
+static inline unsigned int get_nmi_count(int cpu)
+{
+ return cpu_data(cpu).__nmi_count;
+}
+
+static int endflag __initdata;
+
+static __init void nmi_cpu_busy(void *data)
+{
+ local_irq_enable_in_hardirq();
+ while (endflag == 0)
+ mb();
+}
+
+static void report_broken_nmi(int cpu, int *prev_nmi_count)
+{
+ printk(KERN_CONT "\n");
+
+ printk(KERN_WARNING
+ "WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n",
+ cpu, prev_nmi_count[cpu], get_nmi_count(cpu));
+
+ printk(KERN_WARNING
+ "Please report this to bugzilla.kernel.org,\n");
+ printk(KERN_WARNING
+ "and attach the output of the 'dmesg' command.\n");
+
+ nmi_usable = 0;
+}
+
+static void stop_watchdog(void *unused)
+{
+ pcr_ops->write(PCR_PIC_PRIV);
+}
+
+static int __init check_nmi_watchdog(void)
+{
+ unsigned int *prev_nmi_count;
+ int cpu, err;
+
+ prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(unsigned int), GFP_KERNEL);
+ if (!prev_nmi_count) {
+ err = -ENOMEM;
+ goto error;
+ }
+
+ printk(KERN_INFO "Testing NMI watchdog ... ");
+
+ smp_call_function(nmi_cpu_busy, (void *)&endflag, 0);
+
+ for_each_possible_cpu(cpu)
+ prev_nmi_count[cpu] = get_nmi_count(cpu);
+ local_irq_enable();
+ mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */
+
+ for_each_online_cpu(cpu) {
+ if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5)
+ report_broken_nmi(cpu, prev_nmi_count);
+ }
+ endflag = 1;
+ if (!nmi_usable) {
+ kfree(prev_nmi_count);
+ err = -ENODEV;
+ goto error;
+ }
+ printk("OK.\n");
+
+ nmi_hz = 1;
+
+ kfree(prev_nmi_count);
+ return 0;
+error:
+ on_each_cpu(stop_watchdog, NULL, 1);
+ return err;
+}
+
+static void start_watchdog(void *unused)
+{
+ pcr_ops->write(PCR_PIC_PRIV);
+ write_pic(picl_value(nmi_hz));
+
+ pcr_ops->write(pcr_enable);
+}
+
+void nmi_adjust_hz(unsigned int new_hz)
+{
+ nmi_hz = new_hz;
+ on_each_cpu(start_watchdog, NULL, 1);
+}
+EXPORT_SYMBOL_GPL(nmi_adjust_hz);
+
+int __init nmi_init(void)
+{
+ nmi_usable = 1;
+
+ on_each_cpu(start_watchdog, NULL, 1);
+
+ return check_nmi_watchdog();
+}
+
+static int __init setup_nmi_watchdog(char *str)
+{
+ if (!strncmp(str, "panic", 5))
+ panic_on_timeout = 1;
+
+ return 0;
+}
+__setup("nmi_watchdog=", setup_nmi_watchdog);
diff --git a/arch/sparc/kernel/pcr.c b/arch/sparc/kernel/pcr.c
new file mode 100644
index 0000000..92e0dda
--- /dev/null
+++ b/arch/sparc/kernel/pcr.c
@@ -0,0 +1,153 @@
+/* pcr.c: Generic sparc64 performance counter infrastructure.
+ *
+ * Copyright (C) 2009 David S. Miller (davem@davemloft.net)
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/pil.h>
+#include <asm/pcr.h>
+#include <asm/nmi.h>
+
+/* This code is shared between various users of the performance
+ * counters. Users will be oprofile, pseudo-NMI watchdog, and the
+ * perf_counter support layer.
+ */
+
+#define PCR_SUN4U_ENABLE (PCR_PIC_PRIV | PCR_STRACE | PCR_UTRACE)
+#define PCR_N2_ENABLE (PCR_PIC_PRIV | PCR_STRACE | PCR_UTRACE | \
+ PCR_N2_TOE_OV1 | \
+ (2 << PCR_N2_SL1_SHIFT) | \
+ (0xff << PCR_N2_MASK1_SHIFT))
+
+u64 pcr_enable;
+unsigned int picl_shift;
+
+/* Performance counter interrupts run unmasked at PIL level 15.
+ * Therefore we can't do things like wakeups and other work
+ * that expects IRQ disabling to be adhered to in locking etc.
+ *
+ * Therefore in such situations we defer the work by signalling
+ * a lower level cpu IRQ.
+ */
+void deferred_pcr_work_irq(int irq, struct pt_regs *regs)
+{
+ clear_softint(1 << PIL_DEFERRED_PCR_WORK);
+}
+
+void schedule_deferred_pcr_work(void)
+{
+ set_softint(1 << PIL_DEFERRED_PCR_WORK);
+}
+
+const struct pcr_ops *pcr_ops;
+EXPORT_SYMBOL_GPL(pcr_ops);
+
+static u64 direct_pcr_read(void)
+{
+ u64 val;
+
+ read_pcr(val);
+ return val;
+}
+
+static void direct_pcr_write(u64 val)
+{
+ write_pcr(val);
+}
+
+static const struct pcr_ops direct_pcr_ops = {
+ .read = direct_pcr_read,
+ .write = direct_pcr_write,
+};
+
+static void n2_pcr_write(u64 val)
+{
+ unsigned long ret;
+
+ ret = sun4v_niagara2_setperf(HV_N2_PERF_SPARC_CTL, val);
+ if (val != HV_EOK)
+ write_pcr(val);
+}
+
+static const struct pcr_ops n2_pcr_ops = {
+ .read = direct_pcr_read,
+ .write = n2_pcr_write,
+};
+
+static unsigned long perf_hsvc_group;
+static unsigned long perf_hsvc_major;
+static unsigned long perf_hsvc_minor;
+
+static int __init register_perf_hsvc(void)
+{
+ if (tlb_type == hypervisor) {
+ switch (sun4v_chip_type) {
+ case SUN4V_CHIP_NIAGARA1:
+ perf_hsvc_group = HV_GRP_NIAG_PERF;
+ break;
+
+ case SUN4V_CHIP_NIAGARA2:
+ perf_hsvc_group = HV_GRP_N2_CPU;
+ break;
+
+ default:
+ return -ENODEV;
+ }
+
+
+ perf_hsvc_major = 1;
+ perf_hsvc_minor = 0;
+ if (sun4v_hvapi_register(perf_hsvc_group,
+ perf_hsvc_major,
+ &perf_hsvc_minor)) {
+ printk("perfmon: Could not register hvapi.\n");
+ return -ENODEV;
+ }
+ }
+ return 0;
+}
+
+static void __init unregister_perf_hsvc(void)
+{
+ if (tlb_type != hypervisor)
+ return;
+ sun4v_hvapi_unregister(perf_hsvc_group);
+}
+
+int __init pcr_arch_init(void)
+{
+ int err = register_perf_hsvc();
+
+ if (err)
+ return err;
+
+ switch (tlb_type) {
+ case hypervisor:
+ pcr_ops = &n2_pcr_ops;
+ pcr_enable = PCR_N2_ENABLE;
+ picl_shift = 2;
+ break;
+
+ case cheetah:
+ case cheetah_plus:
+ case spitfire:
+ pcr_ops = &direct_pcr_ops;
+ pcr_enable = PCR_SUN4U_ENABLE;
+ break;
+
+ default:
+ err = -ENODEV;
+ goto out_unregister;
+ }
+
+ return nmi_init();
+
+out_unregister:
+ unregister_perf_hsvc();
+ return err;
+}
+
+arch_initcall(pcr_arch_init);
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c
index cc8b560..a73954b 100644
--- a/arch/sparc/kernel/process_64.c
+++ b/arch/sparc/kernel/process_64.c
@@ -29,6 +29,7 @@
#include <linux/cpu.h>
#include <linux/elfcore.h>
#include <linux/sysrq.h>
+#include <linux/nmi.h>
#include <asm/uaccess.h>
#include <asm/system.h>
@@ -52,8 +53,10 @@
static void sparc64_yield(int cpu)
{
- if (tlb_type != hypervisor)
+ if (tlb_type != hypervisor) {
+ touch_nmi_watchdog();
return;
+ }
clear_thread_flag(TIF_POLLING_NRFLAG);
smp_mb__after_clear_bit();
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index 49d061f..f2bcfd2 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -354,6 +354,7 @@ static int show_cpuinfo(struct seq_file *m, void *__unused)
seq_printf(m,
"cpu\t\t: %s\n"
"fpu\t\t: %s\n"
+ "pmu\t\t: %s\n"
"prom\t\t: %s\n"
"type\t\t: %s\n"
"ncpus probed\t: %d\n"
@@ -366,6 +367,7 @@ static int show_cpuinfo(struct seq_file *m, void *__unused)
,
sparc_cpu_type,
sparc_fpu_type,
+ sparc_pmu_type,
prom_version,
((tlb_type == hypervisor) ?
"sun4v" :
diff --git a/arch/sparc/kernel/ttable.S b/arch/sparc/kernel/ttable.S
index ea92550..d9bdfb9 100644
--- a/arch/sparc/kernel/ttable.S
+++ b/arch/sparc/kernel/ttable.S
@@ -63,7 +63,8 @@ tl0_irq6: TRAP_IRQ(smp_call_function_single_client, 6)
#else
tl0_irq6: BTRAP(0x46)
#endif
-tl0_irq7: BTRAP(0x47) BTRAP(0x48) BTRAP(0x49)
+tl0_irq7: TRAP_IRQ(deferred_pcr_work_irq, 7)
+tl0_irq8: BTRAP(0x48) BTRAP(0x49)
tl0_irq10: BTRAP(0x4a) BTRAP(0x4b) BTRAP(0x4c) BTRAP(0x4d)
tl0_irq14: TRAP_IRQ(timer_interrupt, 14)
tl0_irq15: TRAP_NMI_IRQ(perfctr_irq, 15)
diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c
index a9e474b..4ab8993 100644
--- a/arch/sparc/mm/fault_64.c
+++ b/arch/sparc/mm/fault_64.c
@@ -19,6 +19,7 @@
#include <linux/interrupt.h>
#include <linux/kprobes.h>
#include <linux/kdebug.h>
+#include <linux/percpu.h>
#include <asm/page.h>
#include <asm/pgtable.h>
@@ -224,6 +225,30 @@ cannot_handle:
unhandled_fault (address, current, regs);
}
+static void noinline bogus_32bit_fault_tpc(struct pt_regs *regs)
+{
+ static int times;
+
+ if (times++ < 10)
+ printk(KERN_ERR "FAULT[%s:%d]: 32-bit process reports "
+ "64-bit TPC [%lx]\n",
+ current->comm, current->pid,
+ regs->tpc);
+ show_regs(regs);
+}
+
+static void noinline bogus_32bit_fault_address(struct pt_regs *regs,
+ unsigned long addr)
+{
+ static int times;
+
+ if (times++ < 10)
+ printk(KERN_ERR "FAULT[%s:%d]: 32-bit process "
+ "reports 64-bit fault address [%lx]\n",
+ current->comm, current->pid, addr);
+ show_regs(regs);
+}
+
asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
{
struct mm_struct *mm = current->mm;
@@ -244,6 +269,19 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
(fault_code & FAULT_CODE_DTLB))
BUG();
+ if (test_thread_flag(TIF_32BIT)) {
+ if (!(regs->tstate & TSTATE_PRIV)) {
+ if (unlikely((regs->tpc >> 32) != 0)) {
+ bogus_32bit_fault_tpc(regs);
+ goto intr_or_no_mm;
+ }
+ }
+ if (unlikely((address >> 32) != 0)) {
+ bogus_32bit_fault_address(regs, address);
+ goto intr_or_no_mm;
+ }
+ }
+
if (regs->tstate & TSTATE_PRIV) {
unsigned long tpc = regs->tpc;
@@ -264,12 +302,6 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
if (in_atomic() || !mm)
goto intr_or_no_mm;
- if (test_thread_flag(TIF_32BIT)) {
- if (!(regs->tstate & TSTATE_PRIV))
- regs->tpc &= 0xffffffff;
- address &= 0xffffffff;
- }
-
if (!down_read_trylock(&mm->mmap_sem)) {
if ((regs->tstate & TSTATE_PRIV) &&
!search_exception_tables(regs->tpc)) {
diff --git a/arch/sparc/oprofile/init.c b/arch/sparc/oprofile/init.c
index d6e170c..d172f86 100644
--- a/arch/sparc/oprofile/init.c
+++ b/arch/sparc/oprofile/init.c
@@ -13,217 +13,57 @@
#include <linux/init.h>
#ifdef CONFIG_SPARC64
-#include <asm/hypervisor.h>
-#include <asm/spitfire.h>
-#include <asm/cpudata.h>
-#include <asm/irq.h>
+#include <linux/notifier.h>
+#include <linux/rcupdate.h>
+#include <linux/kdebug.h>
+#include <asm/nmi.h>
-static int nmi_enabled;
-
-struct pcr_ops {
- u64 (*read)(void);
- void (*write)(u64);
-};
-static const struct pcr_ops *pcr_ops;
-
-static u64 direct_pcr_read(void)
-{
- u64 val;
-
- read_pcr(val);
- return val;
-}
-
-static void direct_pcr_write(u64 val)
-{
- write_pcr(val);
-}
-
-static const struct pcr_ops direct_pcr_ops = {
- .read = direct_pcr_read,
- .write = direct_pcr_write,
-};
-
-static void n2_pcr_write(u64 val)
+static int profile_timer_exceptions_notify(struct notifier_block *self,
+ unsigned long val, void *data)
{
- unsigned long ret;
-
- ret = sun4v_niagara2_setperf(HV_N2_PERF_SPARC_CTL, val);
- if (val != HV_EOK)
- write_pcr(val);
-}
-
-static const struct pcr_ops n2_pcr_ops = {
- .read = direct_pcr_read,
- .write = n2_pcr_write,
-};
-
-/* In order to commonize as much of the implementation as
- * possible, we use PICH as our counter. Mostly this is
- * to accomodate Niagara-1 which can only count insn cycles
- * in PICH.
- */
-static u64 picl_value(void)
-{
- u32 delta = local_cpu_data().clock_tick / HZ;
-
- return ((u64)((0 - delta) & 0xffffffff)) << 32;
-}
-
-#define PCR_PIC_PRIV 0x00000001 /* PIC access is privileged */
-#define PCR_STRACE 0x00000002 /* Trace supervisor events */
-#define PCR_UTRACE 0x00000004 /* Trace user events */
-#define PCR_N2_HTRACE 0x00000008 /* Trace hypervisor events */
-#define PCR_N2_TOE_OV0 0x00000010 /* Trap if PIC 0 overflows */
-#define PCR_N2_TOE_OV1 0x00000020 /* Trap if PIC 1 overflows */
-#define PCR_N2_MASK0 0x00003fc0
-#define PCR_N2_MASK0_SHIFT 6
-#define PCR_N2_SL0 0x0003c000
-#define PCR_N2_SL0_SHIFT 14
-#define PCR_N2_OV0 0x00040000
-#define PCR_N2_MASK1 0x07f80000
-#define PCR_N2_MASK1_SHIFT 19
-#define PCR_N2_SL1 0x78000000
-#define PCR_N2_SL1_SHIFT 27
-#define PCR_N2_OV1 0x80000000
-
-#define PCR_SUN4U_ENABLE (PCR_PIC_PRIV | PCR_STRACE | PCR_UTRACE)
-#define PCR_N2_ENABLE (PCR_PIC_PRIV | PCR_STRACE | PCR_UTRACE | \
- PCR_N2_TOE_OV1 | \
- (2 << PCR_N2_SL1_SHIFT) | \
- (0xff << PCR_N2_MASK1_SHIFT))
-
-static u64 pcr_enable = PCR_SUN4U_ENABLE;
-
-static void nmi_handler(struct pt_regs *regs)
-{
- pcr_ops->write(PCR_PIC_PRIV);
-
- if (nmi_enabled) {
- oprofile_add_sample(regs, 0);
-
- write_pic(picl_value());
- pcr_ops->write(pcr_enable);
- }
-}
-
-/* We count "clock cycle" events in the lower 32-bit PIC.
- * Then configure it such that it overflows every HZ, and thus
- * generates a level 15 interrupt at that frequency.
- */
-static void cpu_nmi_start(void *_unused)
-{
- pcr_ops->write(PCR_PIC_PRIV);
- write_pic(picl_value());
-
- pcr_ops->write(pcr_enable);
-}
+ struct die_args *args = (struct die_args *)data;
+ int ret = NOTIFY_DONE;
-static void cpu_nmi_stop(void *_unused)
-{
- pcr_ops->write(PCR_PIC_PRIV);
-}
-
-static int nmi_start(void)
-{
- int err = register_perfctr_intr(nmi_handler);
-
- if (!err) {
- nmi_enabled = 1;
- wmb();
- err = on_each_cpu(cpu_nmi_start, NULL, 1);
- if (err) {
- nmi_enabled = 0;
- wmb();
- on_each_cpu(cpu_nmi_stop, NULL, 1);
- release_perfctr_intr(nmi_handler);
- }
+ switch (val) {
+ case DIE_NMI:
+ oprofile_add_sample(args->regs, 0);
+ ret = NOTIFY_STOP;
+ break;
+ default:
+ break;
}
-
- return err;
-}
-
-static void nmi_stop(void)
-{
- nmi_enabled = 0;
- wmb();
-
- on_each_cpu(cpu_nmi_stop, NULL, 1);
- release_perfctr_intr(nmi_handler);
- synchronize_sched();
+ return ret;
}
-static unsigned long perf_hsvc_group;
-static unsigned long perf_hsvc_major;
-static unsigned long perf_hsvc_minor;
+static struct notifier_block profile_timer_exceptions_nb = {
+ .notifier_call = profile_timer_exceptions_notify,
+};
-static int __init register_perf_hsvc(void)
+static int timer_start(void)
{
- if (tlb_type == hypervisor) {
- switch (sun4v_chip_type) {
- case SUN4V_CHIP_NIAGARA1:
- perf_hsvc_group = HV_GRP_NIAG_PERF;
- break;
-
- case SUN4V_CHIP_NIAGARA2:
- perf_hsvc_group = HV_GRP_N2_CPU;
- break;
-
- default:
- return -ENODEV;
- }
-
-
- perf_hsvc_major = 1;
- perf_hsvc_minor = 0;
- if (sun4v_hvapi_register(perf_hsvc_group,
- perf_hsvc_major,
- &perf_hsvc_minor)) {
- printk("perfmon: Could not register N2 hvapi.\n");
- return -ENODEV;
- }
- }
+ if (register_die_notifier(&profile_timer_exceptions_nb))
+ return 1;
+ nmi_adjust_hz(HZ);
return 0;
}
-static void unregister_perf_hsvc(void)
+
+static void timer_stop(void)
{
- if (tlb_type != hypervisor)
- return;
- sun4v_hvapi_unregister(perf_hsvc_group);
+ nmi_adjust_hz(1);
+ unregister_die_notifier(&profile_timer_exceptions_nb);
+ synchronize_sched(); /* Allow already-started NMIs to complete. */
}
-static int oprofile_nmi_init(struct oprofile_operations *ops)
+static int op_nmi_timer_init(struct oprofile_operations *ops)
{
- int err = register_perf_hsvc();
-
- if (err)
- return err;
-
- switch (tlb_type) {
- case hypervisor:
- pcr_ops = &n2_pcr_ops;
- pcr_enable = PCR_N2_ENABLE;
- break;
-
- case cheetah:
- case cheetah_plus:
- pcr_ops = &direct_pcr_ops;
- break;
-
- default:
+ if (!nmi_usable)
return -ENODEV;
- }
- ops->create_files = NULL;
- ops->setup = NULL;
- ops->shutdown = NULL;
- ops->start = nmi_start;
- ops->stop = nmi_stop;
+ ops->start = timer_start;
+ ops->stop = timer_stop;
ops->cpu_type = "timer";
-
- printk(KERN_INFO "oprofile: Using perfctr based NMI timer interrupt.\n");
-
+ printk(KERN_INFO "oprofile: Using perfctr NMI timer interrupt.\n");
return 0;
}
#endif
@@ -233,7 +73,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
int ret = -ENODEV;
#ifdef CONFIG_SPARC64
- ret = oprofile_nmi_init(ops);
+ ret = op_nmi_timer_init(ops);
if (!ret)
return ret;
#endif
@@ -241,10 +81,6 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
return ret;
}
-
void oprofile_arch_exit(void)
{
-#ifdef CONFIG_SPARC64
- unregister_perf_hsvc();
-#endif
}
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