summaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorBen Dooks <ben-linux@fluff.org>2009-12-09 00:08:35 +0000
committerBen Dooks <ben-linux@fluff.org>2010-01-15 17:10:10 +0900
commit682e2b7d45878586ce84f6993da0b8a2981a399d (patch)
tree7d64665810dd9d2783067714e49f4c51c752b57b /arch
parentf3e0b724cc70ef5ee2a6e0d9dfafa2328c294ab3 (diff)
downloadop-kernel-dev-682e2b7d45878586ce84f6993da0b8a2981a399d.zip
op-kernel-dev-682e2b7d45878586ce84f6993da0b8a2981a399d.tar.gz
ARM: S3C64XX: Avoid announcing clksrc clocks twice
The new code calls the clock setup code on registration which can be before the clock system has been fully initialised. The following code re-does this setup at the end of the clock registration and thus we get two printings. Update the calls to only print on the last pass or when doing the necessary resume work. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-clock.c4
-rw-r--r--arch/arm/plat-samsung/clock-clksrc.c16
-rw-r--r--arch/arm/plat-samsung/include/plat/clock-clksrc.h10
3 files changed, 22 insertions, 8 deletions
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index 555d1aa..cb2bf4b 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -486,10 +486,10 @@ void __init_or_cpufreq s3c6400_setup_clocks(void)
clk_f.rate = fclk;
for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
- s3c_set_clksrc(init_parents[ptr]);
+ s3c_set_clksrc(init_parents[ptr], true);
for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
- s3c_set_clksrc(&clksrcs[ptr]);
+ s3c_set_clksrc(&clksrcs[ptr], true);
}
static struct clk *clks[] __initdata = {
diff --git a/arch/arm/plat-samsung/clock-clksrc.c b/arch/arm/plat-samsung/clock-clksrc.c
index ad4e872..12129f8 100644
--- a/arch/arm/plat-samsung/clock-clksrc.c
+++ b/arch/arm/plat-samsung/clock-clksrc.c
@@ -125,7 +125,7 @@ static unsigned long s3c_roundrate_clksrc(struct clk *clk,
/* Clock initialisation code */
-void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk *clk)
+void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk *clk, bool announce)
{
struct clksrc_sources *srcs = clk->sources;
u32 mask = bit_mask(clk->reg_src.shift, clk->reg_src.size);
@@ -145,9 +145,10 @@ void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk *clk)
clk->clk.parent = srcs->sources[clksrc];
- printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
- clk->clk.name, clk->clk.parent->name, clksrc,
- clk_get_rate(&clk->clk));
+ if (announce)
+ printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n",
+ clk->clk.name, clk->clk.parent->name, clksrc,
+ clk_get_rate(&clk->clk));
}
static struct clk_ops clksrc_ops = {
@@ -166,7 +167,12 @@ void __init s3c_register_clksrc(struct clksrc_clk *clksrc, int size)
if (!clksrc->clk.ops)
clksrc->clk.ops = &clksrc_ops;
- s3c_set_clksrc(clksrc);
+ /* setup the clocksource, but do not announce it
+ * as it may be re-set by the setup routines
+ * called after the rest of the clocks have been
+ * registered
+ */
+ s3c_set_clksrc(clksrc, false);
ret = s3c24xx_register_clock(&clksrc->clk);
diff --git a/arch/arm/plat-samsung/include/plat/clock-clksrc.h b/arch/arm/plat-samsung/include/plat/clock-clksrc.h
index 283dfa0..50a8ca7 100644
--- a/arch/arm/plat-samsung/include/plat/clock-clksrc.h
+++ b/arch/arm/plat-samsung/include/plat/clock-clksrc.h
@@ -63,7 +63,15 @@ struct clksrc_clk {
struct clksrc_reg reg_div;
};
-extern void s3c_set_clksrc(struct clksrc_clk *clk);
+/**
+ * s3c_set_clksrc() - setup the clock from the register settings
+ * @clk: The clock to setup.
+ * @announce: true to announce the setting to printk().
+ *
+ * Setup the clock from the current register settings, for when the
+ * kernel boots or if it is resuming from a possibly unknown state.
+ */
+extern void s3c_set_clksrc(struct clksrc_clk *clk, bool announce);
/**
* s3c_register_clksrc() register clocks from an array of clksrc clocks
OpenPOWER on IntegriCloud