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authorThomas Gleixner <tglx@linutronix.de>2007-10-14 22:57:45 +0200
committerThomas Gleixner <tglx@inhelltoy.tec.linutronix.de>2007-10-14 22:57:45 +0200
commit3ac508be76bf4ef5861365d9f337f990d523be8f (patch)
tree3e8f0f75cc539cceeda033d63e48aa2a4f397b44 /arch
parent1595f452f3d8daa066bfd3ba4120754bed3329e1 (diff)
downloadop-kernel-dev-3ac508be76bf4ef5861365d9f337f990d523be8f.zip
op-kernel-dev-3ac508be76bf4ef5861365d9f337f990d523be8f.tar.gz
x86: move local APIC timer init to the end of start_secondary()
Preparatory patch for the AMD C1E wreckage fixup. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/smpboot_64.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/x86/kernel/smpboot_64.c b/arch/x86/kernel/smpboot_64.c
index 57ccf7c..720a7d1 100644
--- a/arch/x86/kernel/smpboot_64.c
+++ b/arch/x86/kernel/smpboot_64.c
@@ -335,11 +335,6 @@ void __cpuinit start_secondary(void)
*/
check_tsc_sync_target();
- Dprintk("cpu %d: setting up apic clock\n", smp_processor_id());
- setup_secondary_APIC_clock();
-
- Dprintk("cpu %d: enabling apic timer\n", smp_processor_id());
-
if (nmi_watchdog == NMI_IO_APIC) {
disable_8259A_irq(0);
enable_NMI_through_LVT0(NULL);
@@ -374,6 +369,8 @@ void __cpuinit start_secondary(void)
unlock_ipi_call_lock();
+ setup_secondary_APIC_clock();
+
cpu_idle();
}
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