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| author | Wolfgang Grandegger <wg@grandegger.com> | 2009-03-30 12:02:42 +0200 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-04-06 07:17:09 -0700 |
| commit | b6e0e8c07754c8aefd6ff3536463fed5f71405a0 (patch) | |
| tree | 84233509d5ccf9efea3e92785c101ce3b051eaef /arch | |
| parent | db99a5523175ba15fef4719c722cea11b94911bb (diff) | |
| download | op-kernel-dev-b6e0e8c07754c8aefd6ff3536463fed5f71405a0.zip op-kernel-dev-b6e0e8c07754c8aefd6ff3536463fed5f71405a0.tar.gz | |
[MTD] [NAND] FSL-UPM: add multi chip support
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. This requires support for multiple GPIOs for the RNB pins.
The NAND chips are selected through address lines defined by the
FDT property "fsl,upm-addr-line-cs-offsets".
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/sysdev/fsl_lbc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c index 0494ee5..dceb8d1 100644 --- a/arch/powerpc/sysdev/fsl_lbc.c +++ b/arch/powerpc/sysdev/fsl_lbc.c @@ -150,7 +150,7 @@ int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar) spin_lock_irqsave(&fsl_lbc_lock, flags); - out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width)); + out_be32(&fsl_lbc_regs->mar, mar); switch (upm->width) { case 8: |
