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authorYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>2008-11-27 18:57:35 +0900
committerPaul Mundt <lethal@linux-sh.org>2008-12-22 18:43:50 +0900
commit331ff103c7737294c8ecd7921564dae07b9e4632 (patch)
tree593a3ea9ea3986dbdcaf8a3ae329a023b7d5ddae /arch
parent22f131aa8de7a534339bf7051680234462f2e877 (diff)
downloadop-kernel-dev-331ff103c7737294c8ecd7921564dae07b9e4632.zip
op-kernel-dev-331ff103c7737294c8ecd7921564dae07b9e4632.tar.gz
sh: pci-sh7780: fix pci memory address mask
Fix the problem that cannot work a PCI device when system memory size is 256Mbyte in 29bit address mode. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index b2a2bfa..078dc44 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -123,16 +123,14 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
* Window0 = map->window0.size @ non-cached area base = SDRAM
* Window1 = map->window1.size @ cached area base = SDRAM
*/
- word = ((map->window0.size - 1) & 0x1ff00001) | 0x01;
- pci_write_reg(0x07f00001, SH4_PCILSR0);
- word = ((map->window1.size - 1) & 0x1ff00001) | 0x01;
+ word = (CONFIG_MEMORY_SIZE - 0x00100000) | 0x00000001;
+ pci_write_reg(word, SH4_PCILSR0);
pci_write_reg(0x00000001, SH4_PCILSR1);
/* Set the values on window 0 PCI config registers */
- word = P2SEGADDR(map->window0.base);
- pci_write_reg(0xa8000000, SH4_PCILAR0);
- pci_write_reg(0x08000000, SH7780_PCIMBAR0);
+ word = (CONFIG_MEMORY_SIZE > 0x08000000) ? 0x10000000 : 0x08000000;
+ pci_write_reg(word | 0xa0000000, SH4_PCILAR0);
+ pci_write_reg(word, SH7780_PCIMBAR0);
/* Set the values on window 1 PCI config registers */
- word = P2SEGADDR(map->window1.base);
pci_write_reg(0x00000000, SH4_PCILAR1);
pci_write_reg(0x00000000, SH7780_PCIMBAR1);
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