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author | Catalin Marinas <catalin.marinas@arm.com> | 2007-07-11 11:29:39 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-07-12 16:20:52 +0100 |
commit | d1cbbd6b413510c6512f4f80ffd48db1a8dd554a (patch) | |
tree | fb3f908530cf2c4957aa45256214ed7d59557820 /arch | |
parent | f884b1cf578e079f01682514ae1ae64c74586602 (diff) | |
download | op-kernel-dev-d1cbbd6b413510c6512f4f80ffd48db1a8dd554a.zip op-kernel-dev-d1cbbd6b413510c6512f4f80ffd48db1a8dd554a.tar.gz |
[ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regs
When running Linux in non-secure mode (on ARM1176 for example),
depending on the CP15 secure configuration register, the CPSR.F bit
(6) might only be modified from the secure mode. However, the
valid_user_regs() function checks for this bit being cleared. With
commit a6c61e9d, a SIGSEGV is forced in handle_signal() if the user
registers are not considered valid.
The patch also ensures that the CPSR.A bit is cleared and the USR mode
is set if the CPU does not support the 26bit user mode.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions