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author | Valentin Longchamp <valentin.longchamp@keymile.com> | 2014-06-04 17:34:01 +0200 |
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committer | Scott Wood <scottwood@freescale.com> | 2014-06-20 18:48:36 -0500 |
commit | db75c22f1a1ebdb608eca2a0e17bffed470d43ec (patch) | |
tree | 8ea1f8db03ff40553ed990e2ae671972cfef76d9 /arch | |
parent | a1e0fb420989512af903a347e43fd61d4513b6d4 (diff) | |
download | op-kernel-dev-db75c22f1a1ebdb608eca2a0e17bffed470d43ec.zip op-kernel-dev-db75c22f1a1ebdb608eca2a0e17bffed470d43ec.tar.gz |
powerpc/mpc85xx: fix fsl/p2041-post.dtsi clockgen mux2
The mux2 node is missing the clock-output-names field that is required
by the clk-ppc-corenet driver.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi index 5290df8..69ce102 100644 --- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi @@ -359,6 +359,7 @@ compatible = "fsl,qoriq-core-mux-1.0"; clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; + clock-output-names = "cmux2"; }; mux3: mux3@60 { |