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author | Max Filippov <jcmvbkbc@gmail.com> | 2012-09-17 05:44:40 +0400 |
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committer | Chris Zankel <chris@zankel.net> | 2012-10-03 15:11:42 -0700 |
commit | d38efc1f150f38b7f593ac7e26789c550d4bc183 (patch) | |
tree | 79ec8a6d3066c0e0fe0d303ed62e48bdba8cede1 /arch | |
parent | 02f3774877382bac52972a677c2c5fbd3532a1a1 (diff) | |
download | op-kernel-dev-d38efc1f150f38b7f593ac7e26789c550d4bc183.zip op-kernel-dev-d38efc1f150f38b7f593ac7e26789c550d4bc183.tar.gz |
xtensa: adopt generic io routines
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/xtensa/Kconfig | 2 | ||||
-rw-r--r-- | arch/xtensa/include/asm/io.h | 156 | ||||
-rw-r--r-- | arch/xtensa/kernel/Makefile | 2 | ||||
-rw-r--r-- | arch/xtensa/kernel/io.c | 75 |
4 files changed, 12 insertions, 223 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 8ed64cf..2debe94 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -11,6 +11,8 @@ config XTENSA select HAVE_GENERIC_HARDIRQS select GENERIC_IRQ_SHOW select GENERIC_CPU_DEVICES + select MODULES_USE_ELF_RELA + select GENERIC_PCI_IOMAP help Xtensa processors are 32-bit RISC machines designed by Tensilica primarily for embedded systems. These processors are both diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h index 4f66dfc..e6be5b9 100644 --- a/arch/xtensa/include/asm/io.h +++ b/arch/xtensa/include/asm/io.h @@ -25,74 +25,31 @@ #define XCHAL_KIO_SIZE 0x10000000 #define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x)) +#define IO_SPACE_LIMIT ~0 +#ifdef CONFIG_MMU /* - * swap functions to change byte order from little-endian to big-endian and - * vice versa. - */ - -static inline unsigned short _swapw (unsigned short v) -{ - return (v << 8) | (v >> 8); -} - -static inline unsigned int _swapl (unsigned int v) -{ - return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24); -} - -/* - * Change virtual addresses to physical addresses and vv. - * These are trivial on the 1:1 Linux/Xtensa mapping - */ - -static inline unsigned long virt_to_phys(volatile void * address) -{ - return __pa(address); -} - -static inline void * phys_to_virt(unsigned long address) -{ - return __va(address); -} - -/* - * virt_to_bus and bus_to_virt are deprecated. - */ - -#define virt_to_bus(x) virt_to_phys(x) -#define bus_to_virt(x) phys_to_virt(x) - -/* - * Return the virtual (cached) address for the specified bus memory. + * Return the virtual address for the specified bus memory. * Note that we currently don't support any address outside the KIO segment. */ static inline void __iomem *ioremap_nocache(unsigned long offset, unsigned long size) { -#ifdef CONFIG_MMU if (offset >= XCHAL_KIO_PADDR && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE) return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR); else BUG(); -#else - return (void *)offset; -#endif } static inline void __iomem *ioremap_cache(unsigned long offset, unsigned long size) { -#ifdef CONFIG_MMU if (offset >= XCHAL_KIO_PADDR && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE) return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR); else BUG(); -#else - return (void *)offset; -#endif } #define ioremap_wc ioremap_nocache @@ -105,112 +62,17 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size) static inline void iounmap(volatile void __iomem *addr) { } +#endif /* CONFIG_MMU */ /* * Generic I/O */ - -#define readb(addr) \ - ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; }) -#define readw(addr) \ - ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; }) -#define readl(addr) \ - ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; }) -#define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b)) -#define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b)) -#define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b)) - -static inline __u8 __raw_readb(const volatile void __iomem *addr) -{ - return *(__force volatile __u8 *)(addr); -} -static inline __u16 __raw_readw(const volatile void __iomem *addr) -{ - return *(__force volatile __u16 *)(addr); -} -static inline __u32 __raw_readl(const volatile void __iomem *addr) -{ - return *(__force volatile __u32 *)(addr); -} -static inline void __raw_writeb(__u8 b, volatile void __iomem *addr) -{ - *(__force volatile __u8 *)(addr) = b; -} -static inline void __raw_writew(__u16 b, volatile void __iomem *addr) -{ - *(__force volatile __u16 *)(addr) = b; -} -static inline void __raw_writel(__u32 b, volatile void __iomem *addr) -{ - *(__force volatile __u32 *)(addr) = b; -} - -/* These are the definitions for the x86 IO instructions - * inb/inw/inl/outb/outw/outl, the "string" versions - * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions - * inb_p/inw_p/... - * The macros don't do byte-swapping. - */ - -#define inb(port) readb((u8 *)((port))) -#define outb(val, port) writeb((val),(u8 *)((unsigned long)(port))) -#define inw(port) readw((u16 *)((port))) -#define outw(val, port) writew((val),(u16 *)((unsigned long)(port))) -#define inl(port) readl((u32 *)((port))) -#define outl(val, port) writel((val),(u32 *)((unsigned long)(port))) - -#define inb_p(port) inb((port)) -#define outb_p(val, port) outb((val), (port)) -#define inw_p(port) inw((port)) -#define outw_p(val, port) outw((val), (port)) -#define inl_p(port) inl((port)) -#define outl_p(val, port) outl((val), (port)) - -extern void insb (unsigned long port, void *dst, unsigned long count); -extern void insw (unsigned long port, void *dst, unsigned long count); -extern void insl (unsigned long port, void *dst, unsigned long count); -extern void outsb (unsigned long port, const void *src, unsigned long count); -extern void outsw (unsigned long port, const void *src, unsigned long count); -extern void outsl (unsigned long port, const void *src, unsigned long count); - -#define IO_SPACE_LIMIT ~0 - -#define memset_io(a,b,c) memset((void *)(a),(b),(c)) -#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) -#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) - -/* At this point the Xtensa doesn't provide byte swap instructions */ - -#ifdef __XTENSA_EB__ -# define in_8(addr) (*(u8*)(addr)) -# define in_le16(addr) _swapw(*(u16*)(addr)) -# define in_le32(addr) _swapl(*(u32*)(addr)) -# define out_8(b, addr) *(u8*)(addr) = (b) -# define out_le16(b, addr) *(u16*)(addr) = _swapw(b) -# define out_le32(b, addr) *(u32*)(addr) = _swapl(b) -#elif defined(__XTENSA_EL__) -# define in_8(addr) (*(u8*)(addr)) -# define in_le16(addr) (*(u16*)(addr)) -# define in_le32(addr) (*(u32*)(addr)) -# define out_8(b, addr) *(u8*)(addr) = (b) -# define out_le16(b, addr) *(u16*)(addr) = (b) -# define out_le32(b, addr) *(u32*)(addr) = (b) -#else -# error processor byte order undefined! -#endif - - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - +#define readb_relaxed readb +#define readw_relaxed readw +#define readl_relaxed readl #endif /* __KERNEL__ */ +#include <asm-generic/io.h> + #endif /* _XTENSA_IO_H */ diff --git a/arch/xtensa/kernel/Makefile b/arch/xtensa/kernel/Makefile index 0f9f35f..f36cef5 100644 --- a/arch/xtensa/kernel/Makefile +++ b/arch/xtensa/kernel/Makefile @@ -6,7 +6,7 @@ extra-y := head.o vmlinux.lds obj-y := align.o entry.o irq.o coprocessor.o process.o ptrace.o \ setup.o signal.o syscall.o time.o traps.o vectors.o platform.o \ - pci-dma.o io.o + pci-dma.o obj-$(CONFIG_KGDB) += xtensa-stub.o obj-$(CONFIG_PCI) += pci.o diff --git a/arch/xtensa/kernel/io.c b/arch/xtensa/kernel/io.c deleted file mode 100644 index 5b65269..0000000 --- a/arch/xtensa/kernel/io.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * arch/xtensa/io.c - * - * IO primitives - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Copied from sparc. - * - * Chris Zankel <chris@zankel.net> - * - */ - -#include <asm/io.h> -#include <asm/byteorder.h> - -void outsb(unsigned long addr, const void *src, unsigned long count) { - while (count) { - count -= 1; - writeb(*(const char *)src, addr); - src += 1; - addr += 1; - } -} - -void outsw(unsigned long addr, const void *src, unsigned long count) { - while (count) { - count -= 2; - writew(*(const short *)src, addr); - src += 2; - addr += 2; - } -} - -void outsl(unsigned long addr, const void *src, unsigned long count) { - while (count) { - count -= 4; - writel(*(const long *)src, addr); - src += 4; - addr += 4; - } -} - -void insb(unsigned long addr, void *dst, unsigned long count) { - while (count) { - count -= 1; - *(unsigned char *)dst = readb(addr); - dst += 1; - addr += 1; - } -} - -void insw(unsigned long addr, void *dst, unsigned long count) { - while (count) { - count -= 2; - *(unsigned short *)dst = readw(addr); - dst += 2; - addr += 2; - } -} - -void insl(unsigned long addr, void *dst, unsigned long count) { - while (count) { - count -= 4; - /* - * XXX I am sure we are in for an unaligned trap here. - */ - *(unsigned long *)dst = readl(addr); - dst += 4; - addr += 4; - } -} |