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authorChris Metcalf <cmetcalf@tilera.com>2010-08-13 20:43:39 -0400
committerChris Metcalf <cmetcalf@tilera.com>2010-08-15 11:05:33 -0400
commitb3ae98ab8217a8621859e1d9cbf3ee6c4c19533b (patch)
treedfab5358562d26fcdf9924346cde822252ec3192 /arch
parent947e7dc1aed0532478e10988328bfd7426e0c2bd (diff)
downloadop-kernel-dev-b3ae98ab8217a8621859e1d9cbf3ee6c4c19533b.zip
op-kernel-dev-b3ae98ab8217a8621859e1d9cbf3ee6c4c19533b.tar.gz
arch/tile: rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGN
See commit a6eb9fe105d5de0053b261148cee56c94b4720ca. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Diffstat (limited to 'arch')
-rw-r--r--arch/tile/include/asm/cache.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/tile/include/asm/cache.h b/arch/tile/include/asm/cache.h
index f610184..08a2815 100644
--- a/arch/tile/include/asm/cache.h
+++ b/arch/tile/include/asm/cache.h
@@ -27,11 +27,10 @@
#define L2_CACHE_ALIGN(x) (((x)+(L2_CACHE_BYTES-1)) & -L2_CACHE_BYTES)
/*
- * TILE-Gx is fully coherents so we don't need to define
- * ARCH_KMALLOC_MINALIGN.
+ * TILE-Gx is fully coherent so we don't need to define ARCH_DMA_MINALIGN.
*/
#ifndef __tilegx__
-#define ARCH_KMALLOC_MINALIGN L2_CACHE_BYTES
+#define ARCH_DMA_MINALIGN L2_CACHE_BYTES
#endif
/* use the cache line size for the L2, which is where it counts */
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