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authorIngo Molnar <mingo@elte.hu>2008-01-30 13:32:38 +0100
committerIngo Molnar <mingo@elte.hu>2008-01-30 13:32:38 +0100
commit6d5f718a497375f853d90247f5f6963368e89803 (patch)
tree217745cfd6bc0cd6ed28a98f402b54a2ce7a5471 /arch
parent707fa8ed923b1b6a3d7af0d386b0b3abad28ed19 (diff)
downloadop-kernel-dev-6d5f718a497375f853d90247f5f6963368e89803.zip
op-kernel-dev-6d5f718a497375f853d90247f5f6963368e89803.tar.gz
x86: lfence fix
LFENCE is available on XMM2 or higher Intel CPUs - not XMM or higher... this caused boot failures on XMM1 & !XMM1 capable CPUs. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/intel.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 0a4abdb..5731de3 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -203,7 +203,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
}
#endif
- if (cpu_has_xmm)
+ if (cpu_has_xmm2)
set_bit(X86_FEATURE_LFENCE_RDTSC, c->x86_capability);
if (c->x86 == 15) {
set_bit(X86_FEATURE_P4, c->x86_capability);
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