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author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2013-04-09 23:06:39 +0200 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2013-04-15 14:53:53 +0000 |
commit | 513a7917b13370d9fbc41331413428dd713cb3fc (patch) | |
tree | 933e15bf6ac76dd394e57f66d1fbcd059b855f68 /arch | |
parent | 3b723ae8c68af92977ac16144559e0ba884a35c2 (diff) | |
download | op-kernel-dev-513a7917b13370d9fbc41331413428dd713cb3fc.zip op-kernel-dev-513a7917b13370d9fbc41331413428dd713cb3fc.tar.gz |
arm: mvebu: PCIe Device Tree informations for Armada XP GP
The Marvell Armada XP GP board has 3 physical full-size PCIe slots, so
we enable the corresponding PCIe interfaces in the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/armada-xp-gp.dts | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index e57e9c7..04f28a7 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -138,5 +138,26 @@ bank-width = <2>; }; }; + + pcie-controller { + status = "okay"; + + /* + * The 3 slots are physically present as + * standard PCIe slots on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + pcie@9,0 { + /* Port 2, Lane 0 */ + status = "okay"; + }; + pcie@10,0 { + /* Port 3, Lane 0 */ + status = "okay"; + }; + }; }; }; |