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authorAdrian Hunter <adrian.hunter@nokia.com>2010-11-24 13:23:21 +0200
committerTony Lindgren <tony@atomide.com>2011-01-19 14:41:21 -0800
commit4fb699b408b559107f1e1b47d176d33361446b69 (patch)
treed9143f8d15980a77df872d2c5c564bdc58885e13 /arch
parent35a78fa48678926464138aab3a4dede4503befb5 (diff)
downloadop-kernel-dev-4fb699b408b559107f1e1b47d176d33361446b69.zip
op-kernel-dev-4fb699b408b559107f1e1b47d176d33361446b69.tar.gz
omap: DMA: clear interrupt status correctly
When clearing the DMA channel, clear all status bits. When handling a DMA interrupt, clear only the interrupt status bits that have been read and are passed to the channel's interrupt handler, not every status bit. Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: G, Manjunath Kondaiah <manjugk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-omap/dma.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c4b2b47..8536308 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -53,7 +53,7 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
#endif
#define OMAP_DMA_ACTIVE 0x01
-#define OMAP2_DMA_CSR_CLEAR_MASK 0xffe
+#define OMAP2_DMA_CSR_CLEAR_MASK 0xffffffff
#define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec)
@@ -1873,7 +1873,7 @@ static int omap2_dma_handle_ch(int ch)
printk(KERN_INFO "DMA misaligned error with device %d\n",
dma_chan[ch].dev_id);
- p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, ch);
+ p->dma_write(status, CSR, ch);
p->dma_write(1 << ch, IRQSTATUS_L0, ch);
/* read back the register to flush the write */
p->dma_read(IRQSTATUS_L0, ch);
@@ -1893,10 +1893,9 @@ static int omap2_dma_handle_ch(int ch)
OMAP_DMA_CHAIN_INCQHEAD(chain_id);
status = p->dma_read(CSR, ch);
+ p->dma_write(status, CSR, ch);
}
- p->dma_write(status, CSR, ch);
-
if (likely(dma_chan[ch].callback != NULL))
dma_chan[ch].callback(ch, status, dma_chan[ch].data);
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