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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-12-05 11:39:37 +0100 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2017-01-03 10:50:35 +0100 |
commit | 460d4117a4714f3e9ae600974df03632139728ec (patch) | |
tree | 7fc5d34ce6ba42d36fa29e802d0016c9f6d4839b /arch | |
parent | 7ce7d89f48834cefece7804d38fc5d85382edf77 (diff) | |
download | op-kernel-dev-460d4117a4714f3e9ae600974df03632139728ec.zip op-kernel-dev-460d4117a4714f3e9ae600974df03632139728ec.tar.gz |
ARM: shmobile: apmu: Add more register documentation
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-shmobile/platsmp-apmu.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index 0c6bb45..933f9b9 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -31,9 +31,15 @@ static struct { int bit; } apmu_cpus[NR_CPUS]; -#define WUPCR_OFFS 0x10 -#define PSTR_OFFS 0x40 -#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n))) +#define WUPCR_OFFS 0x10 /* Wake Up Control Register */ +#define PSTR_OFFS 0x40 /* Power Status Register */ +#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n))) + /* CPUn Power Status Control Register */ + +/* Power Status Register */ +#define CPUNST(r, n) (((r) >> (n * 4)) & 3) /* CPUn Status Bit */ +#define CPUST_RUN 0 /* Run Mode */ +#define CPUST_STANDBY 3 /* CoreStandby Mode */ static int __maybe_unused apmu_power_on(void __iomem *p, int bit) { @@ -59,7 +65,7 @@ static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit) int k; for (k = 0; k < 1000; k++) { - if (((readl_relaxed(p + PSTR_OFFS) >> (bit * 4)) & 0x03) == 3) + if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY) return 1; mdelay(1); |