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authorAndrew Bresticker <abrestic@chromium.org>2013-08-19 04:58:38 +0900
committerKukjin Kim <kgene.kim@samsung.com>2013-08-19 04:58:38 +0900
commit35e8277520861a8a4f1dfde8977ec9c9fab03564 (patch)
tree5bdff58f3d98b2983f538bf6e5acab26291fc84f /arch
parent0bd03f6ff628148329e9efed07f146a9532061ec (diff)
downloadop-kernel-dev-35e8277520861a8a4f1dfde8977ec9c9fab03564.zip
op-kernel-dev-35e8277520861a8a4f1dfde8977ec9c9fab03564.tar.gz
ARM: dts: add audio clock controller for exynos5420
This adds device-tree bindings for the audio subsystem clock controller on Exynos 5420. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/57712 Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index fef1b2e..c950bad 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -15,6 +15,9 @@
#include "exynos5.dtsi"
#include "exynos5420-pinctrl.dtsi"
+
+#include <dt-bindings/clk/exynos-audss-clk.h>
+
/ {
compatible = "samsung,exynos5420";
@@ -65,6 +68,14 @@
#clock-cells = <1>;
};
+ clock_audss: audss-clock-controller@3810000 {
+ compatible = "samsung,exynos5420-audss-clock";
+ reg = <0x03810000 0x0C>;
+ #clock-cells = <1>;
+ clocks = <&clock 148>;
+ clock-names = "sclk_audio";
+ };
+
codec@11000000 {
compatible = "samsung,mfc-v7";
reg = <0x11000000 0x10000>;
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