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authorLinus Torvalds <torvalds@linux-foundation.org>2016-10-05 17:44:48 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2016-10-05 17:44:48 -0700
commitd8ea757b25ec82687c497fc90aa83f9bcea24b5b (patch)
tree4789c4d89f1ec77dcb27b855e2f479c3afd511cb /arch/xtensa/platforms
parent41844e36206be90cd4d962ea49b0abc3612a99d0 (diff)
parenta4c6be5ad1d0c7af0c5421b68a00b6406b28a325 (diff)
downloadop-kernel-dev-d8ea757b25ec82687c497fc90aa83f9bcea24b5b.zip
op-kernel-dev-d8ea757b25ec82687c497fc90aa83f9bcea24b5b.tar.gz
Merge tag 'xtensa-20161005' of git://github.com/jcmvbkbc/linux-xtensa
Pull Xtensa updates from Max Filippov: "Updates for the xtensa architecture. It is a combined set of patches for 4.8 that never got to the mainline and new patches for 4.9. - add new kernel memory layouts for MMUv3 cores: with 256MB and 512MB KSEG size, starting at physical address other than 0 - make kernel load address configurable - clean up kernel memory layout macros - drop sysmem early allocator and switch to memblock - enable kmemleak and memory reservation from the device tree - wire up new syscalls: userfaultfd, membarrier, mlock2, copy_file_range, preadv2 and pwritev2 - add new platform: Cadence Configurable System Platform (CSP) and new core variant for it: xt_lnx - rearrange CCOUNT calibration code, make most of it generic - improve machine reset code (XTFPGA now reboots reliably with MMUv3 cores) - provide default memmap command line option for configurations without device tree support - ISS fixes: simdisk is now capable of using highmem pages, panic correctly terminates simulator" * tag 'xtensa-20161005' of git://github.com/jcmvbkbc/linux-xtensa: (24 commits) xtensa: disable MMU initialization option on MMUv2 cores xtensa: add default memmap and mmio32native options to defconfigs xtensa: add default memmap option to common_defconfig xtensa: add default memmap option to iss_defconfig xtensa: ISS: allow simdisk to use high memory buffers xtensa: ISS: define simc_exit and use it instead of inline asm xtensa: xtfpga: group platform_* functions together xtensa: rearrange CCOUNT calibration xtensa: xtfpga: use clock provider, don't update DT xtensa: Tweak xuartps UART driver Rx watermark for Cadence CSP config. xtensa: initialize MMU before jumping to reset vector xtensa: fix icountlevel setting in cpu_reset xtensa: extract common CPU reset code into separate function xtensa: Added Cadence CSP kernel configuration for Xtensa xtensa: fix default kernel load address xtensa: wire up new syscalls xtensa: support reserved-memory DT node xtensa: drop sysmem and switch to memblock xtensa: minimize use of PLATFORM_DEFAULT_MEM_{ADDR,SIZE} xtensa: cleanup MMU setup and kernel layout macros ...
Diffstat (limited to 'arch/xtensa/platforms')
-rw-r--r--arch/xtensa/platforms/iss/include/platform/simcall.h5
-rw-r--r--arch/xtensa/platforms/iss/setup.c28
-rw-r--r--arch/xtensa/platforms/iss/simdisk.c1
-rw-r--r--arch/xtensa/platforms/xt2000/setup.c21
-rw-r--r--arch/xtensa/platforms/xtfpga/setup.c116
5 files changed, 54 insertions, 117 deletions
diff --git a/arch/xtensa/platforms/iss/include/platform/simcall.h b/arch/xtensa/platforms/iss/include/platform/simcall.h
index 12b15ad..27d7a52 100644
--- a/arch/xtensa/platforms/iss/include/platform/simcall.h
+++ b/arch/xtensa/platforms/iss/include/platform/simcall.h
@@ -76,6 +76,11 @@ static inline int __simc(int a, int b, int c, int d)
return ret;
}
+static inline int simc_exit(int exit_code)
+{
+ return __simc(SYS_exit, exit_code, 0, 0);
+}
+
static inline int simc_open(const char *file, int flags, int mode)
{
return __simc(SYS_open, (int) file, flags, mode);
diff --git a/arch/xtensa/platforms/iss/setup.c b/arch/xtensa/platforms/iss/setup.c
index 3918205..379aedd 100644
--- a/arch/xtensa/platforms/iss/setup.c
+++ b/arch/xtensa/platforms/iss/setup.c
@@ -32,6 +32,8 @@
#include <asm/platform.h>
#include <asm/bootparam.h>
+#include <platform/simcall.h>
+
void __init platform_init(bp_tag_t* bootparam)
{
@@ -41,37 +43,19 @@ void __init platform_init(bp_tag_t* bootparam)
void platform_halt(void)
{
pr_info(" ** Called platform_halt() **\n");
- __asm__ __volatile__("movi a2, 1\nsimcall\n");
+ simc_exit(0);
}
void platform_power_off(void)
{
pr_info(" ** Called platform_power_off() **\n");
- __asm__ __volatile__("movi a2, 1\nsimcall\n");
+ simc_exit(0);
}
void platform_restart(void)
{
/* Flush and reset the mmu, simulate a processor reset, and
* jump to the reset vector. */
-
- __asm__ __volatile__("movi a2, 15\n\t"
- "wsr a2, icountlevel\n\t"
- "movi a2, 0\n\t"
- "wsr a2, icount\n\t"
-#if XCHAL_NUM_IBREAK > 0
- "wsr a2, ibreakenable\n\t"
-#endif
-#if XCHAL_HAVE_LOOPS
- "wsr a2, lcount\n\t"
-#endif
- "movi a2, 0x1f\n\t"
- "wsr a2, ps\n\t"
- "isync\n\t"
- "jx %0\n\t"
- :
- : "a" (XCHAL_RESET_VECTOR_VADDR)
- : "a2");
-
+ cpu_reset();
/* control never gets here */
}
@@ -98,7 +82,7 @@ void platform_heartbeat(void)
static int
iss_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
{
- __asm__ __volatile__("movi a2, -1; simcall\n");
+ simc_exit(1);
return NOTIFY_DONE;
}
diff --git a/arch/xtensa/platforms/iss/simdisk.c b/arch/xtensa/platforms/iss/simdisk.c
index f58a4e6..ede04cc 100644
--- a/arch/xtensa/platforms/iss/simdisk.c
+++ b/arch/xtensa/platforms/iss/simdisk.c
@@ -86,6 +86,7 @@ static void simdisk_transfer(struct simdisk *dev, unsigned long sector,
unsigned long io;
simc_lseek(dev->fd, offset, SEEK_SET);
+ READ_ONCE(*buffer);
if (write)
io = simc_write(dev->fd, buffer, nbytes);
else
diff --git a/arch/xtensa/platforms/xt2000/setup.c b/arch/xtensa/platforms/xt2000/setup.c
index 4904c5c..9c2f1fb 100644
--- a/arch/xtensa/platforms/xt2000/setup.c
+++ b/arch/xtensa/platforms/xt2000/setup.c
@@ -64,26 +64,7 @@ void platform_restart(void)
{
/* Flush and reset the mmu, simulate a processor reset, and
* jump to the reset vector. */
-
- __asm__ __volatile__ ("movi a2, 15\n\t"
- "wsr a2, icountlevel\n\t"
- "movi a2, 0\n\t"
- "wsr a2, icount\n\t"
-#if XCHAL_NUM_IBREAK > 0
- "wsr a2, ibreakenable\n\t"
-#endif
-#if XCHAL_HAVE_LOOPS
- "wsr a2, lcount\n\t"
-#endif
- "movi a2, 0x1f\n\t"
- "wsr a2, ps\n\t"
- "isync\n\t"
- "jx %0\n\t"
- :
- : "a" (XCHAL_RESET_VECTOR_VADDR)
- : "a2"
- );
-
+ cpu_reset();
/* control never gets here */
}
diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c
index b509d1f..779be72 100644
--- a/arch/xtensa/platforms/xtfpga/setup.c
+++ b/arch/xtensa/platforms/xtfpga/setup.c
@@ -26,6 +26,8 @@
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/of.h>
+#include <linux/clk-provider.h>
+#include <linux/of_address.h>
#include <asm/timex.h>
#include <asm/processor.h>
@@ -54,58 +56,63 @@ void platform_restart(void)
{
/* Flush and reset the mmu, simulate a processor reset, and
* jump to the reset vector. */
+ cpu_reset();
+ /* control never gets here */
+}
+void __init platform_setup(char **cmdline)
+{
+}
- __asm__ __volatile__ ("movi a2, 15\n\t"
- "wsr a2, icountlevel\n\t"
- "movi a2, 0\n\t"
- "wsr a2, icount\n\t"
-#if XCHAL_NUM_IBREAK > 0
- "wsr a2, ibreakenable\n\t"
-#endif
-#if XCHAL_HAVE_LOOPS
- "wsr a2, lcount\n\t"
-#endif
- "movi a2, 0x1f\n\t"
- "wsr a2, ps\n\t"
- "isync\n\t"
- "jx %0\n\t"
- :
- : "a" (XCHAL_RESET_VECTOR_VADDR)
- : "a2"
- );
+/* early initialization */
- /* control never gets here */
+void __init platform_init(bp_tag_t *first)
+{
}
-void __init platform_setup(char **cmdline)
+/* Heartbeat. */
+
+void platform_heartbeat(void)
+{
+}
+
+#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
+
+void __init platform_calibrate_ccount(void)
{
+ ccount_freq = *(long *)XTFPGA_CLKFRQ_VADDR;
}
+#endif
+
#ifdef CONFIG_OF
-static void __init update_clock_frequency(struct device_node *node)
+static void __init xtfpga_clk_setup(struct device_node *np)
{
- struct property *newfreq;
+ void __iomem *base = of_iomap(np, 0);
+ struct clk *clk;
u32 freq;
- if (!of_property_read_u32(node, "clock-frequency", &freq) && freq != 0)
+ if (!base) {
+ pr_err("%s: invalid address\n", np->name);
return;
+ }
- newfreq = kzalloc(sizeof(*newfreq) + sizeof(u32), GFP_KERNEL);
- if (!newfreq)
- return;
- newfreq->value = newfreq + 1;
- newfreq->length = sizeof(freq);
- newfreq->name = kstrdup("clock-frequency", GFP_KERNEL);
- if (!newfreq->name) {
- kfree(newfreq);
+ freq = __raw_readl(base);
+ iounmap(base);
+ clk = clk_register_fixed_rate(NULL, np->name, NULL, 0, freq);
+
+ if (IS_ERR(clk)) {
+ pr_err("%s: clk registration failed\n", np->name);
return;
}
- *(u32 *)newfreq->value = cpu_to_be32(*(u32 *)XTFPGA_CLKFRQ_VADDR);
- of_update_property(node, newfreq);
+ if (of_clk_add_provider(np, of_clk_src_simple_get, clk)) {
+ pr_err("%s: clk provider registration failed\n", np->name);
+ return;
+ }
}
+CLK_OF_DECLARE(xtfpga_clk, "cdns,xtfpga-clock", xtfpga_clk_setup);
#define MAC_LEN 6
static void __init update_local_mac(struct device_node *node)
@@ -137,56 +144,15 @@ static void __init update_local_mac(struct device_node *node)
static int __init machine_setup(void)
{
- struct device_node *clock;
struct device_node *eth = NULL;
- for_each_node_by_name(clock, "main-oscillator")
- update_clock_frequency(clock);
-
if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
update_local_mac(eth);
return 0;
}
arch_initcall(machine_setup);
-#endif
-
-/* early initialization */
-
-void __init platform_init(bp_tag_t *first)
-{
-}
-
-/* Heartbeat. */
-
-void platform_heartbeat(void)
-{
-}
-
-#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
-
-void __init platform_calibrate_ccount(void)
-{
- long clk_freq = 0;
-#ifdef CONFIG_OF
- struct device_node *cpu =
- of_find_compatible_node(NULL, NULL, "cdns,xtensa-cpu");
- if (cpu) {
- u32 freq;
- update_clock_frequency(cpu);
- if (!of_property_read_u32(cpu, "clock-frequency", &freq))
- clk_freq = freq;
- }
-#endif
- if (!clk_freq)
- clk_freq = *(long *)XTFPGA_CLKFRQ_VADDR;
-
- ccount_freq = clk_freq;
-}
-
-#endif
-
-#ifndef CONFIG_OF
+#else
#include <linux/serial_8250.h>
#include <linux/if.h>
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